The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2014
Filed:
Jul. 06, 2011
Makoto Kiyama, Itami, JP;
Yu Saitoh, Itami, JP;
Masaya Okada, Osaka, JP;
Seiji Yaegashi, Yokohama, JP;
Kazutaka Inoue, Yokohama, JP;
Mitsunori Yokoyama, Yokohama, JP;
Makoto Kiyama, Itami, JP;
Yu Saitoh, Itami, JP;
Masaya Okada, Osaka, JP;
Seiji Yaegashi, Yokohama, JP;
Kazutaka Inoue, Yokohama, JP;
Mitsunori Yokoyama, Yokohama, JP;
Sumitomo Electric Industries, Ltd., Osaka-shi, JP;
Abstract
There is provided a vertical GaN-based semiconductor device in which the on-resistance can be decreased while the breakdown voltage characteristics are improved using a p-type GaN barrier layer. The semiconductor device includes a regrown layerincluding a channel located on a wall surface of an opening, a p-type barrier layerwhose end face is covered, a source layerthat is in contact with the p-type barrier layer, a gate electrode G located on the regrown layer, and a source electrode S located around the opening. In the semiconductor device, the source layer has a superlattice structure that is constituted by a stacked layer including a first layer (a layer) having a lattice constant smaller than that of the p-type barrier layer and a second layer (b layer) having a lattice constant larger than that of the first layer.