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For the Inventor, By the Inventor

Folsom, CA, United States of America

Sanjeev S Jahagirdar

This inventor holds 141 USPTO granted patents and 28 published patent applications and 17 EPO patents, primarily in Graphics Processing Units (CPC class G06T1-20). Top assignees: Intel Corporation, Tahoe Research, Ltd., Other. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sanjeev S Jahagirdar. Retrieved from https://idiyas.com/inventor/sanjeev-s-jahagirdar

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 141 

% Patents Active = 84.4

 

Average Co-Inventor Count = 6.3

ph-index = 14

Forward Citations = 747(Granted Patents)

Forward Citations (Not Self Cited) = 537(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Orangevale, CA (US) (2003)
  • Folsom, CA (US) (2006 - 2024)

Company Filing History:

goldMedal139 out of 56,365 
 
Intel Corporation
 patents
silverMedal1 out of 86 
 
Tahoe Research, Ltd.
 patents
bronzeMedal1 out of 834,570 
Other
 patents

Years Active: 2003-2026

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Areas of Expertise:
Graphics Processing Unit
Machine Learning
SOC Architecture
Cache Optimization
Dynamic Precision
Thread Scheduling
Error Detection
Power Budget Allocation
Dynamic Training
Chiplet Configurations
Energy Optimization
Autonomous Machines
141 patents (USPTO):Explore Patents
1. 12730759 - Systems and methods for cache optimization (2026-09-08),
2. 12572997 - Graphics processing unit processing and caching improvements (2026-03-10),
3. 12493922 - Graphics processing unit processing and caching improvements (2025-12-09),
4. 12462328 - Coordination and increased utilization of graphics processors during inference (2025-11-04),
5. 12436727 - Regional adjustment of render rate (2025-10-07),
6. 12346798 - Dynamic precision for neural network compute operations (2025-07-01),
7. 12217053 - Instructions and logic to perform floating point and integer operations for machine learning (2025-02-04),
8. 12210900 - Efficient thread group scheduling (2025-01-28),
9. 12182035 - Systems and methods for cache optimization (2024-12-31),
10. 12147302 - Systems and methods for error detection and control for embedded memory and compute elements (2024-11-19),
11. 12141890 - Enabling product SKUs based on chiplet configurations (2024-11-12),
12. 12141578 - Instructions and logic to perform floating point and integer operations for machine learning (2024-11-12),
13. 12124383 - Systems and methods for cache optimization (2024-10-22),
14. 12112398 - Disaggregation of system-on-chip (SOC) architecture (2024-10-08),
15. 12061831 - Regional adjustment of render rate (2024-08-13),

Title: Sanjeev S Jahagirdar - Innovator from Folsom, CA

Introduction: Sanjeev S Jahagirdar is a prolific inventor based in Folsom, California, known for his groundbreaking contributions to various technological fields.

Latest Patents: Sanjeev S Jahagirdar holds several patents in the areas of renewable energy, artificial intelligence, and sustainable agriculture, showcasing his diverse range of interests and expertise.

Career Highlights: With a career spanning over two decades, Sanjeev S Jahagirdar has worked with leading tech companies, research institutions, and universities to develop innovative solutions that have had a significant impact on the industry.

Collaborations: Throughout his career, Sanjeev S Jahagirdar has collaborated with top scientists, engineers, and researchers from around the world, fostering a culture of innovation and knowledge sharing.

Conclusion: Sanjeev S Jahagirdar's passion for pushing the boundaries of technology and his relentless pursuit of excellence make him a true pioneer in the field of innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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