The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2024
Filed:
Jul. 12, 2022
Intel Corporation, Santa Clara, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Joydeep Ray, Folsom, CA (US);
Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);
Abhishek Appu, El Dorado Hills, CA (US);
Aravindh Anantaraman, Folsom, CA (US);
Valentin Andrei, San Jose, CA (US);
Durgaprasad Bilagi, Folsom, CA (US);
Varghese George, Folsom, CA (US);
Brent Insko, Portland, OR (US);
Sanjeev Jahagirdar, Folsom, CA (US);
Scott Janus, Loomis, CA (US);
Pattabhiraman K, Bangalore, IN;
SungYe Kim, Folsom, CA (US);
Subramaniam Maiyuran, Gold River, CA (US);
Vasanth Ranganathan, El Dorado Hills, CA (US);
Lakshminarayanan Striramassarma, Folsom, CA (US);
Xinmin Tian, Union City, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Systems and methods for improving cache efficiency and utilization are disclosed. In one embodiment, a graphics processor includes processing resources to perform graphics operations and a cache controller of a cache memory that is coupled to the processing resources. The cache controller is configured to set an initial aging policy using an aging field based on age of cache lines within the cache memory and to determine whether a hint or an instruction to indicate a level of aging has been received. In one embodiment, the cache memory configured to be partitioned into multiple cache regions, wherein the multiple cache regions include a first cache region having a cache eviction policy with a configurable level of data persistence.