The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

May. 17, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Joydeep Ray, Folsom, CA (US);

Abhishek R. Appu, El Dorado Hills, CA (US);

Altug Koker, El Dorado Hills, CA (US);

Kamal Sinha, Rancho Cordova, CA (US);

Balaji Vembu, Folsom, CA (US);

Rajkishore Barik, Santa Clara, CA (US);

Eriko Nurvitadhi, Hillsboro, OR (US);

Nicolas Galoppo Von Borries, Portland, OR (US);

Tsung-Han Lin, Campbell, CA (US);

Sanjeev Jahagirdar, Folsom, CA (US);

Vasanth Ranganathan, El Dorado Hills, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06T 1/20 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06T 1/20 (2013.01); G06F 2209/483 (2013.01); G06F 2209/484 (2013.01);
Abstract

A mechanism is described for facilitating intelligent thread scheduling at autonomous machines. A method of embodiments, as described herein, includes detecting dependency information relating to a plurality of threads corresponding to a plurality of workloads associated with tasks relating to a processor including a graphics processor. The method may further include generating a tree of thread groups based on the dependency information, where each thread group includes multiple threads, and scheduling one or more of the thread groups associated a similar dependency to avoid dependency conflicts.


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