The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2024
Filed:
Sep. 20, 2023
Intel Corporation, Santa Clara, CA (US);
Naveen Matam, Rancho Cordova, CA (US);
Lance Cheney, El Dorado Hills, CA (US);
Eric Finley, Ione, CA (US);
Varghese George, Folsom, CA (US);
Sanjeev Jahagirdar, Folsom, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Josh Mastronarde, Sacramento, CA (US);
Iqbal Rajwani, Roseville, CA (US);
Lakshminarayanan Striramassarma, Folsom, CA (US);
Melaku Teshome, El Dorado Hills, CA (US);
Vikranth Vemulapalli, Folsom, CA (US);
Binoj Xavier, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments described herein provide techniques to disaggregate an architecture of a system on a chip integrated circuit into multiple distinct chiplets that can be packaged onto a common chassis. In one embodiment, a graphics processing unit or parallel processor is composed from diverse silicon chiplets that are separately manufactured. A chiplet is an at least partially and distinctly packaged integrated circuit that includes distinct units of logic that can be assembled with other chiplets into a larger package. A diverse set of chiplets with different IP core logic can be assembled into a single device.