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Robert J Strain

USPTO Granted Patents = 25 (Patent Applications = 2)

EPO Patents = 1

Average Co-Inventor Count = 1.8

ph-index = 10

Forward Citations = 298(Granted Patents)

Location History:

Provo, UT (US) (2019)
San Jose, CA (US) (1984 - 2024)

Company Filing History:

5 out of 4,791

National Semiconductor Corporation

Tower Semiconductor Ltd.

patents

4. 3 out of 1,302

Fairchild Semiconductor Corporation

Fairchild Camera and Instrument Corp.

9. 2 out of 832,891

Other

patents

where one patent can have more than one assignee

Years Active: 1984-2024

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25 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11894039 - FFT-DRAM (2024-02-06),

2. 11373696 - FFT-dram (2022-06-28),

3. 10486057 - Competitive escape rooms (2019-11-26),

4. 9847404 - Fluctuation resistant FinFET (2017-12-19),

5. 9379214 - Reduced variation MOSFET using a drain-extension-last process (2016-06-28),

6. 8247840 - Apparatus and method for improved leakage current of silicon on insulator transistors using a forward biased diode (2012-08-21),

7. 8048732 - Method for reducing leakage current and increasing drive current in a metal-oxide semiconductor (MOS) transistor (2011-11-01),

8. 7898297 - Method and apparatus for dynamic threshold voltage control of MOS transistors in dynamic logic circuits (2011-03-01),

9. 7863689 - Apparatus for using a well current source to effect a dynamic threshold voltage of a MOS transistor (2011-01-04),

10. 7683433 - Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors (2010-03-23),

11. 7544557 - Gate defined Schottky diode (2009-06-09),

12. 7485941 - Cobalt silicide schottky diode on isolated well (2009-02-03),

13. 6809948 - Mask programmable read-only memory (ROM) cell (2004-10-26),

14. 6590797 - Multi-bit programmable memory cell having multiple anti-fuse elements (2003-07-08),

15. 5912779 - Method of reading and writing data on a magnetic medium (1999-06-15),

Title: Robert J Strain: Innovator in Dynamic Memory Technologies

Introduction

Robert J Strain is a prominent inventor based in San Jose, CA, known for his significant contributions to the field of semiconductor technology. With a remarkable portfolio of 25 patents to his name, he has made notable advancements in dynamic random-access memory (DRAM) systems.

Latest Patents

Among his recent innovations, Robert has developed the FFT-DRAM, a flat field transistor-based dynamic random-access memory. This groundbreaking technology features an epitaxially grown source region with a source extension and an epitaxial source that is in contact with the source extension. The design integrates a trench capacitor within the source region, where the first terminal is formed by the source region and the second terminal is composed of a conductive material that fills the trenches of the capacitor. This innovative structure allows for improved performance by connecting the second terminal to either a ground terminal or a fixed voltage terminal.

Career Highlights

Throughout his career, Robert has worked with notable companies in the technology sector. He has held positions at National Semiconductor Corporation and Semi Solutions LLC, where he contributed to various advanced projects in semiconductor technology. His work has significantly impacted the development of memory systems, enhancing both efficiency and performance.

Collaborations

Robert has collaborated with several esteemed professionals, including Ashok K Kapoor and Reuven Avraham Marko. These partnerships have helped foster innovation and advance research in memory technology, leading to the creation of patents that push the boundaries of what is possible in the semiconductor industry.

Conclusion

Robert J Strain continues to be a driving force in the evolution of dynamic memory technologies through his inventive spirit and collaborative efforts. His patents exemplify the cutting-edge advancements in the field, solidifying his position as a key inventor dedicated to improving the functionality of DRAM systems.

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