The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Sep. 11, 2013
Applicants:

Gold Standard Simulations Ltd., Glasgow, Scotland, GB;

Semi Solutions Llc, Los Gatos, CA (US);

Inventors:

Robert J. Strain, San Jose, CA (US);

Asen Asenov, Glasgow, GB;

Assignees:

SemiWise Limited, Glasgow, Scotland, GB;

Semi Solutions LLC, Los Gatos, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 21/308 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/3083 (2013.01); H01L 29/1041 (2013.01); H01L 29/1054 (2013.01); H01L 29/66818 (2013.01); H01L 29/785 (2013.01); H01L 29/7853 (2013.01);
Abstract

This improved, fluctuation resistant FinFET, with a doped core and lightly doped epitaxial channel region between that core and the gate structure, is confined to the active-gate span because it is based on a channel structure having a limited extent. The improved structure is capable of reducing FinFET random doping fluctuations when doping is used to control threshold voltage, and the channel structure reduces fluctuations attributable to doping-related variations in effective channel length. Further, the transistor design affords better source and drain conductance when compared to prior art FinFETs. Two representative embodiments of the key structure are described in detail.


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