Rajeev Malik

This inventor holds 25 USPTO granted patents and 1 EPO patent. Top assignees: International Business Machines Corporation, Infineon Technologies Ag, Infineon Technologies North America Corp.. Active years: 2001-2011.

USPTO Granted Patents = 25

% Patents Active = 40.0

EPO Patents = 1

Average Co-Inventor Count = 4.2

ph-index = 8

Forward Citations = 236(Granted Patents)

Location History:

Wappingers Falls, NY (US) (2003 - 2005)
Pleasantville, NY (US) (2001 - 2011)

Company Filing History:

18 out of 166,159

International Business Machines Corporation

patents

4 out of 15,005

Infineon Technologies Ag

patents

2 out of 244

Infineon Technologies North America Corp.

patents

4. 3 out of 834,307

Other

patents

where one patent can have more than one assignee

Years Active: 2001-2011

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25 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7928571 - Device having dual etch stop liner and reformed silicide layer and related methods (2011-04-19),

2. 7776695 - Semiconductor device structure having low and high performance devices of same conductive type on same substrate (2010-08-17),

3. 7732270 - Device having enhanced stress state and related methods (2010-06-08),

4. 7683434 - Preventing cavitation in high aspect ratio dielectric regions of semiconductor device (2010-03-23),

5. 7627836 - OPC trimming for performance (2009-12-01),

6. 7459384 - Preventing cavitation in high aspect ratio dielectric regions of semiconductor device (2008-12-02),

7. 7446395 - Device having dual etch stop liner and protective layer (2008-11-04),

8. 7446062 - Device having dual etch stop liner and reformed silicide layer and related methods (2008-11-04),

9. 7348635 - Device having enhanced stress state and related methods (2008-03-25),

10. 7306983 - Method for forming dual etch stop liner and protective layer in a semiconductor device (2007-12-11),

11. 7030012 - Method for manufacturing tungsten/polysilicon word line structure in vertical DRAM (2006-04-18),

12. 7018779 - Apparatus and method to improve resist line roughness in semiconductor wafer processing (2006-03-28),

13. 6908806 - Gate metal recess for oxidation protection and parasitic capacitance reduction (2005-06-21),

14. 6897107 - Method for forming TTO nitride liner for improved collar protection and TTO reliability (2005-05-24),

15. 6809368 - TTO nitride liner for improved collar protection and TTO reliability (2004-10-26),

Title: Rajeev Malik - Innovative Inventor from Pleasantville

Introduction: Rajeev Malik is a renowned inventor based in Pleasantville, NY, known for his groundbreaking contributions to various fields of technology.

Latest Patents: Rajeev Malik holds several patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing his diverse range of expertise and innovation.

Career Highlights: With over two decades of experience in the industry, Rajeev Malik has worked with top research institutions and leading companies to develop cutting-edge technologies that have revolutionized their respective fields.

Collaborations: Throughout his career, Rajeev Malik has collaborated with top universities, research institutions, and multinational corporations to bring his innovative ideas to life, resulting in successful products and solutions that have had a significant impact on society.

Conclusion: Rajeev Malik's passion for innovation and his relentless drive to push the boundaries of technology make him a true pioneer in the world of inventions, with a legacy that continues to inspire future generations of inventors.

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