Kaohsiung, Taiwan

Po-Lun Cheng

This inventor holds 16 USPTO granted patents and 4 published patent applications. Top assignee: United Microelectronics Corp.. Active years: 2007-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Po-Lun Cheng. Retrieved from https://idiyas.com/inventor/po-lun-cheng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 16 

% Patents Active = 100.0

Average Co-Inventor Count = 2.3

ph-index = 6

Forward Citations = 239(Granted Patents)


Location History:

  • Fongshan, TW (2007 - 2008)
  • Kaohsiung County, TW (2008 - 2009)
  • Kao-Hsiung Hsien, TW (2010 - 2012)
  • Kaohsiung, TW (2013 - 2017)

Company Filing History:


Years Active: 2007-2017

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16 patents (USPTO):Explore Patents

Title: The Innovations of Po-Lun Cheng: A Pioneer in Semiconductor Technology

Introduction

Po-Lun Cheng, an esteemed inventor based in Kaohsiung County, Taiwan, has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 16 patents, Cheng has developed innovative methods that enhance the performance and efficiency of semiconductor devices.

Latest Patents

Among his latest patents are two notable inventions that exemplify his expertise:

1. **Method of forming gate dielectric layer for MOS transistor** - This method includes steps such as forming a gate dielectric layer on a substrate, performing a nitridation process on the layer, and executing a multi-step post-nitridation annealing process with two oxygen-containing annealing steps at varying temperatures.

2. **Method for fabricating semiconductor device** - This invention outlines a comprehensive process that begins with providing a substrate, forming a gate structure, and creating a spacer around the gate. It further involves forming an epitaxial layer adjacent to the spacer, with specific steps for creating a buffer layer, bulk layer, linear gradient cap, and a silicon cap. Notably, the etching to deposition ratio of the linear gradient cap is crucial, maintained between 50% and 100%.

Career Highlights

Po-Lun Cheng is currently working at United Microelectronics Corporation (UMC), where he leverages his knowledge to advance semiconductor manufacturing processes. Throughout his career, he has been dedicated to developing technologies that increase the reliability and functionality of electronic devices.

Collaborations

Cheng collaborates with skilled engineers and researchers, including Che-Hung Liu and Pin-Chien Chu, to foster innovation within the company. These partnerships enhance the synergy of ideas and technical expertise, driving forward the boundaries of semiconductor research and development.

Conclusion

Po-Lun Cheng stands out as a leading figure in semiconductor innovation, with his patents reflecting a commitment to improving technology in the industry. His work not only benefits United Microelectronics Corporation but also contributes to the global evolution of electronic devices. With continued focus and dedication, Cheng is poised to impact the future of semiconductor technology profoundly.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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