The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 2017
Filed:
Jan. 04, 2015
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Han-Lin Hsu, Kaohsiung, TW;
Po-Lun Cheng, Kaohsiung, TW;
Chun-Liang Chen, Tainan, TW;
Meng-Che Yeh, Tainan, TW;
Shih-Jung Tu, Kaohsiung, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/51 (2006.01); H01L 29/02 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66477 (2013.01); H01L 21/0234 (2013.01); H01L 21/02326 (2013.01); H01L 21/02332 (2013.01); H01L 21/02337 (2013.01); H01L 21/28202 (2013.01); H01L 29/518 (2013.01); H01L 29/6659 (2013.01); H01L 29/513 (2013.01);
Abstract
A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitridation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.