IDiyas

For the Inventor, By the Inventor

Dallas, TX, United States of America

Noel M Russell

USPTO Granted Patents = 15


Average Co-Inventor Count = 2.8

ph-index = 5

Forward Citations = 101(Granted Patents)


Location History:

  • Dallas, TX (US) (1999 - 2001)
  • Plano, TX (US) (2004 - 2010)

Company Filing History:

goldMedal15 out of 29,232 
 
Texas Instruments Corporation
 patents

Years Active: 1999-2010

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15 patents (USPTO):
1. 7803703 - Metal-germanium physical vapor deposition for semiconductor device defect reduction (2010-09-28),
2. 7674707 - Manufacturable reliable diffusion-barrier (2010-03-09),
3. 7435672 - Metal-germanium physical vapor deposition for semiconductor device defect reduction (2008-10-14),
4. 7256121 - Contact resistance reduction by new barrier stack process (2007-08-14),
5. 7208398 - Metal-halogen physical vapor deposition for semiconductor device defect reduction (2007-04-24),
6. 7148140 - Partial plate anneal plate process for deposition of conductive fill material (2006-12-12),
7. 7037837 - Method of fabricating robust nucleation/seed layers for subsequent deposition/fill of metallization layers (2006-05-02),
8. 6900127 - Multilayer integrated circuit copper plateable barriers (2005-05-31),
9. 6864108 - Measurement of wafer temperature in semiconductor processing chambers (2005-03-08),
10. 6723636 - Methods for forming multiple damascene layers (2004-04-20),
11. 6720255 - Semiconductor device with silicon-carbon-oxygen dielectric having improved metal barrier adhesion and method of forming the device (2004-04-13),
12. 6693357 - Methods and semiconductor devices with wiring layer fill structures to improve planarization uniformity (2004-02-17),
13. 6291347 - Method and system for constructing semiconductor devices (2001-09-18),
14. 6235631 - Method for forming titanium aluminum nitride layers (2001-05-22),
15. 5981382 - PVD deposition process for CVD aluminum liner processing (1999-11-09),
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