The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2007
Filed:
Dec. 02, 2004
Duofeng Yue, Plano, TX (US);
Stephan Grunow, Dallas, TX (US);
Satyavolu S. Papa Rao, Garland, TX (US);
Noel M. Russell, Plano, TX (US);
Montray Leavy, McKinney, TX (US);
Duofeng Yue, Plano, TX (US);
Stephan Grunow, Dallas, TX (US);
Satyavolu S. Papa Rao, Garland, TX (US);
Noel M. Russell, Plano, TX (US);
Montray Leavy, McKinney, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a method for forming an interconnect on a semiconductor substrate. The method includes forming an openingover an inner surface of the opening, the depositing forming a reentrant profile near a top portion of the opening. A portion of barrieris etched, which removes at least a portion of the barrierto reduce the reentrant profile. The etching also removes at least a portion of the barrierlayer at the bottom of the opening