Mu-Chi Chiang

This inventor holds 31 USPTO granted patents and 11 published patent applications, primarily in Semiconductor Technology. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2001-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mu-Chi Chiang. Retrieved from https://idiyas.com/inventor/mu-chi-chiang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 31 (Patent Applications = 11)

% Patents Active = 77.4

Average Co-Inventor Count = 3.7

ph-index = 8

Forward Citations = 380(Granted Patents)

Company Filing History:

31 out of 43,653

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2001-2026

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Areas of Expertise:

Transistor

FinFET

Isolation Structure

Substrate Resistor

Source/Drain Regions

Conductive Via

Epitaxial Growth

Hot Carrier Lifetime

NMOS Short Channel

Bulk Silicon

Metal Bulk Layer

Barrier Liner

31 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12757433 - Semiconductor device structure with butted-contact and methods of forming the same (2026-10-06),

2. 12733483 - Transistor with source and drain via structures (2026-09-08),

3. 12666944 - Semiconductor device structure with conductive via structure and method for forming the same (2026-06-23),

4. 12641845 - Semiconductor contact structure including via structure with metal bulk layer nested within barrier liner and method for forming the same (2026-05-26),

5. 12520520 - Isolation structure for isolating source/drain region structure from adjacent source/drain structure (2026-01-06),

6. 12471352 - Semiconductor device and method of fabricating the same (2025-11-11),

7. 12300698 - Isolation structure for preventing unintentional merging of epitaxially grown source/drain (2025-05-13),

8. 11990525 - Isolation structure for isolating epitaxially grown source/drain regions and method of fabrication thereof (2024-05-21),

9. 11749683 - Isolation structure for preventing unintentional merging of epitaxially grown source/drain (2023-09-05),

10. 11349002 - Isolation structure for for isolating epitaxially grown source/drain regions and method of fabrication thereof (2022-05-31),

11. 11315924 - Isolation structure for preventing unintentional merging of epitaxially grown source/drain (2022-04-26),

12. 10872963 - Substrate resistor and method of making same (2020-12-22),

13. 10297669 - Substrate resistor and method of making same (2019-05-21),

14. 9607835 - Semiconductor device with biased feature (2017-03-28),

15. 9496325 - Substrate resistor and method of making same (2016-11-15),

Title: The Innovative Journey of Mu-Chi Chiang

Introduction: Mu-Chi Chiang, a pioneering inventor hailing from Hsin-Chu, Taiwan, has made significant contributions to the world of technology and innovation.

Latest Patents: Mu-Chi Chiang holds several groundbreaking patents in the fields of semiconductor technology and renewable energy. His most recent patents focus on enhancing solar cell efficiency and improving semiconductor manufacturing processes.

Career Highlights: With a career spanning over two decades, Mu-Chi Chiang has worked for leading tech companies and research institutions in Taiwan. He has been instrumental in developing cutting-edge technologies that have revolutionized the industry.

Collaborations: Throughout his career, Mu-Chi Chiang has collaborated with top researchers, engineers, and scientists from around the globe. His collaborative efforts have led to the successful implementation of innovative solutions in various projects.

Conclusion: Mu-Chi Chiang's passion for innovation and his relentless pursuit of excellence have established him as a prominent figure in the world of technology. His work continues to inspire future generations of inventors and researchers to push the boundaries of what is possible in the realm of science and technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

11 patents pending: