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For the Inventor, By the Inventor

Hoi-gun, Japan

Mitsutaka Katada

This inventor holds 15 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Denso Corporation, Nippondenso Co., Ltd., Nippon Soken, Inc.. Active years: 1993-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mitsutaka Katada. Retrieved from https://idiyas.com/inventor/mitsutaka-katada

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 15

% Patents Active = 73.3

Average Co-Inventor Count = 3.8

ph-index = 8

Forward Citations = 200(Granted Patents)


Location History:

  • Kariya, JP (1993 - 1998)
  • Toyokawa, JP (1997 - 2011)
  • Hoi-gun, JP (2002 - 2013)

Company Filing History:

goldMedal7 out of 20,480 
 
Denso Corporation
 patents
silverMedal6 out of 3,252 
 
Nippondenso Co., Ltd.
 patents
bronzeMedal2 out of 1,600 
 
Nippon Soken, Inc.
 patents
4. 1 out of 1,099 
 
Shin-Etsu Handotai Co., Ltd.
 patents
where one patent can have more than one assignee

Years Active: 1993-2013

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Areas of Expertise:
Silicon On Insulator
Nonvolatile Memory
EEPROM
Memory Cells
Charge Retention
MIS Transistor
Leakage Current
Fabrication Process
Conductive Layer
Dielectric Separation
Wiring Formation
Semiconductor Substrate
15 patents (USPTO):Explore Patents
1. 8410573 - SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same (2013-04-02),
2. 8035154 - Semiconductor device including a plurality of memory cells with no difference in erasing properties (2011-10-11),
3. 7796442 - Nonvolatile semiconductor memory device and method of erasing and programming the same (2010-09-14),
4. 7642653 - Semiconductor device, wiring of semiconductor device, and method of forming wiring (2010-01-05),
5. 6914288 - EEPROM and EEPROM manufacturing method (2005-07-05),
6. 6339557 - Charge retention lifetime evaluation method for nonvolatile semiconductor memory (2002-01-15),
7. 6337249 - Semiconductor device and fabrication process thereof (2002-01-08),
8. 6236085 - Semiconductor memory device having high-concentration region around electric-field moderating layer in substrate (2001-05-22),
9. 5753556 - Method of fabricating a MIS transistor (1998-05-19),
10. 5736770 - Semiconductor device with conductive connecting layer and abutting (1998-04-07),
11. 5675167 - Enhancement-type semiconductor having reduced leakage current (1997-10-07),
12. 5532176 - Process for fabricating a complementary MIS transistor (1996-07-02),
13. 5383993 - Method of bonding semiconductor substrates (1995-01-24),
14. 5334870 - Complementary MIS transistor and a fabrication process thereof (1994-08-02),
15. 5223450 - Method of producing semiconductor substrate having dielectric separation (1993-06-29),

Title: The Innovations of Mitsutaka Katada

Introduction

Mitsutaka Katada is a prominent inventor based in Hoi-gun, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 15 patents. His work focuses on enhancing the performance and reliability of semiconductor devices.

Latest Patents

Among his latest patents is a SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same. This invention involves forming a lattice distortion layer by implanting Ar ions into a silicon substrate, which serves as an active layer. The lattice distortion layer acts as a gettering site, preventing leakage current while maintaining tensile stress within specified limits. Another notable patent is for a semiconductor device that includes a plurality of memory cells with consistent erasing properties. This device features a semiconductor substrate, memory cells, bit lines, and source lines, all designed to optimize performance and reliability.

Career Highlights

Mitsutaka Katada has worked with notable companies such as Denso Corporation and Nippondenso Co., Ltd. His experience in these organizations has contributed to his expertise in semiconductor technology and innovation.

Collaborations

Throughout his career, Katada has collaborated with esteemed colleagues, including Hidetoshi Muramoto and Tsutomu Kawaguchi. These partnerships have fostered a collaborative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Mitsutaka Katada's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the field. His work continues to influence advancements in semiconductor devices, showcasing the importance of innovation in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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