Aci Castello, Italy

Mario Giuseppe Saggio

This inventor holds 74 USPTO granted patents and 27 published patent applications and 17 EPO patents, primarily in Silicon Carbide Devices (CPC class H01L). Top assignees: Stmicroelectronics S.r.l., STMicroelectronics, Stmicroelectronics International N.v.. Active years: 2002-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mario Giuseppe Saggio. Retrieved from https://idiyas.com/inventor/mario-giuseppe-saggio

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 74 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.8

ph-index = 7

Forward Citations = 151(Granted Patents)

Forward Citations (Not Self Cited) = 113(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Acicastello, IT (2002 - 2015)
  • Catania, IT (2002 - 2023)
  • Aci Bonaccorsi, IT (2014 - 2024)

Company Filing History:


Years Active: 2002-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Silicon Carbide
MOSFET
Power Device
Manufacturing Process
Vertical Conduction
Electronic Device
Edge Structure
Short-Circuit Performance
Integrated Diode
Reliability
Wide Bandgap
Scalable MPS
74 patents (USPTO):Explore Patents

Title: Mario Giuseppe Saggio: Innovator Extraordinaire in SiC Device Technology

Introduction:

In the realm of semiconductor technology, Mario Giuseppe Saggio has emerged as a prominent figure with his groundbreaking innovations and prolific patent portfolio. Hailing from Aci Castello, Italy, Saggio has made significant contributions in the field of SiC (Silicon Carbide) device technology. This article delves into his latest patents, career highlights, notable collaborations, and celebrates his exceptional expertise in electronic devices.

Latest Patents:

Saggio's ingenuity shines through in his latest patent - a Scalable MPS (Merged-PiN-Schottky) device based on SiC. This invention comprises a substrate of SiC with a drift layer, an implanted region, and electrical terminals, forming an innovative combination of JB (Junction-Barrier) and Schottky diodes. These diodes are alternated along a specific axis, enabling the MPS device to possess a high breakdown voltage exceeding 115% of its maximum working voltage during inhibition.

Manufacturing Method of an Element of an Electronic Device with Improved Reliability:

Among Saggio's recent patents is a manufacturing method for an anchorage element of a passivation layer. This process involves forming implanted regions, carrying out thermal oxidation, and subsequently creating a cavity. With the anchorage element securely fixing the passivation layer to the semiconductor body, this innovation enhances the reliability of electronic devices.

Career Highlights:

Saggio has had a remarkable career, actively contributing to the advancements in SiC technology. He made significant contributions while working at STMicroelectronics, both in their Italian and Swiss branches. Demonstrating his dedication to innovation, Saggio has accumulated an impressive tally of 54 patents over the course of his career, firmly establishing himself as a leading inventive force in the field.

Collaborations:

Saggio's collaborative ventures have greatly influenced his work. Notably, he has worked alongside notable colleagues such as Ferruccio Frisina and Alfio Guarnera. These collaborations have not only strengthened his innovative endeavors but have also fostered an environment of knowledge sharing, leading to groundbreaking outcomes.

Conclusion:

Mario Giuseppe Saggio's exceptional expertise in SiC device technology and his impressive patent portfolio truly make him an innovator extraordinaire. With his recent patents in scalable MPS devices based on SiC and manufacturing methods for enhanced reliability, Saggio continues to push the boundaries of semiconductor technology. His valuable contributions and collaborations with esteemed colleagues have undoubtedly cemented his place in the realm of electronic device innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…