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Geneva, Switzerland

Stmicroelectronics International N.v.

USPTO Granted Patents = 1,250

% Expired Patents = 9.0

EPO Patents = 202

Trademarks = 3

Forward Citations = 1,696

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1,188 inventors (with patents filed for the assignee):

Ankur Bal (55 out of 67 patents)

Vikas Rana (49 out of 51 patents)

Giuseppe Desoli (43 out of 52 patents)

4. Thomas Boesch (41 out of 41 patents)

5. Nitin Chawla (37 out of 41 patents)

6. Venkata Narayanan Srinivasan (37 out of 37 patents)

7. Nitin Kumar Gupta (33 out of 171 patents)

8. Harsh Rawat (31 out of 32 patents)

9. Kedar Janardan Dhori (30 out of 30 patents)

10. Surinder Pal Singh (27 out of 27 patents)

11. Kallol Chatterjee (24 out of 37 patents)

12. Ashish Kumar (24 out of 33 patents)

13. Promod Kumar (24 out of 28 patents)

14. Anuj Grover (23 out of 24 patents)

15. Manuj Ayodhyawasi (22 out of 22 patents)

Core Competencies:

Voltage Regulation

Fault Detection

Memory Management

Integrated Circuit

Digital Power Supply

Convolutional Neural Networks

MEMS Sensors

Charge Pump

Hibernation Management

Data Communication

Gesture Recognition

Clock Synchronization

1,250 patents: Sort by Forward Citations

1. 12763813 - Control voltage adjustment (2026-10-13),

2. 12763674 - Systems, apparatuses, and methods to control a bridgeless totem pole power factor correction (PFC) circuit (2026-10-13),

3. 12763673 - Totem pole power factor correction device and current spike reduction method (2026-10-13),

4. 12761329 - Time-of-flight closest target ranging with pulse distortion immunity (2026-10-13),

5. 12757642 - Process for cointegration of two phase change memory (PCM) arrays having different phase change materials, and in-memory computation system utilizing the two PCM arrays (2026-10-06),

6. 12756393 - Control device for a switching voltage regulator and control method (2026-10-06),

7. 12756346 - Control circuit of a triac or a thyristor (2026-10-06),

8. 12756313 - Half-bridge driver circuit, related integrated circuit, half-bridge circuit and method (2026-10-06),

9. 12754795 - Protection in asynchronous finite state machine (2026-10-06),

10. 12754638 - Adaptive noise reduction in touchscreen devices (2026-10-06),

11. 12754082 - Architecture for piezoresistive pressure sensor drivers and power management (2026-10-06),

12. 12751017 - Memory circuit comprising electronic cells with ovonic threshold switching layers and a control circuit (2026-09-29),

13. 12750011 - Amplifier with temperature dependent gain and temperature compensated bandwidth (2026-09-29),

14. 12750009 - Receiver circuit, corresponding system and method (2026-09-29),

15. 12749977 - Method for controlling a non-inverting buck boost DC-DC converter and corresponding converter (2026-09-29),

Company Overview

STMicroelectronics International N.V., headquartered in Geneva, Switzerland, is a leading global semiconductor company specializing in integrated circuit design. The organization focuses on developing advanced technologies in voltage regulation, fault detection, and memory management. STMicroelectronics is recognized for its contributions to digital power supply solutions, convolutional neural networks, and MEMS sensors, catering to diverse industries including automotive, industrial, and consumer electronics. Its innovative approach positions it at the forefront of the semiconductor market.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

1,250 Patents

#1 in Geneva

#15 in Switzerland

#810 in the World

Geneva, Switzerland

Stmicroelectronics International N.v.

Forward Citations = 1,696

1,188 inventors:

Ankur Bal (55 out of 67 patents)

Vikas Rana (49 out of 51 patents)

Giuseppe Desoli (43 out of 52 patents)

4. Thomas Boesch (41 out of 41 patents)

5. Nitin Chawla (37 out of 41 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Stmicroelectronics International N.v.. Retrieved from https://idiyas.com/company/stmicroelectronics-international-n-v

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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