Gautam Buddha Nagar, India

Venkata Narayanan Srinivasan

This inventor holds 37 USPTO granted patents and 5 published patent applications, primarily in Test Circuit Design. Top assignee: Stmicroelectronics International N.v.. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Venkata Narayanan Srinivasan. Retrieved from https://idiyas.com/inventor/venkata-narayanan-srinivasan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 37 

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 4

Forward Citations = 70(Granted Patents)


Location History:

  • Gautam Budh Nagar District, IN (2017 - 2021)
  • Greater Noida, IN (2016 - 2024)

Company Filing History:


Years Active: 2016-2026

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Areas of Expertise:
Power Reduction
ATPG Testing
Scan Coverage
Voltage Monitoring
Self-Test Controller
Test Pattern Generation
JTAG Interface
Dual Power Flow
Isolation Logic
Fault Detection
Integrated Device Testing
37 patents (USPTO):Explore Patents

Title: Innovations of Venkata Narayanan Srinivasan: A Leader in Electronic Testing Solutions

Introduction

Venkata Narayanan Srinivasan is a prominent inventor based in Gautam Budh Nagar District, India, with an impressive portfolio of 31 patents. His work primarily focuses on electronic device testing methods, showcasing his expertise and contribution to the field of electronics.

Latest Patents

Among his recent innovations, two patents stand out. The first is titled "System and method for parallel testing of electronic devices," which details processes for testing voltage monitor circuits. This method includes setting voltage monitor circuits to test mode, calibrating monitor references to targeted threshold voltages, and systematically determining voltage values that affect logic states in these circuits.

The second patent, "TVF transition coverage with self-test and production-test time reduction," introduces advanced methods for testing triple-voting flops (TVFs). The technique involves managing scan enable signals and analyzing output signals to identify faults in the TVF effectively, ultimately streamlining electronic testing processes.

Career Highlights

Currently, Venkata Narayanan Srinivasan is associated with STMicroelectronics International N.V., where he contributes to groundbreaking developments in electronic testing technology. His extensive experience and innovative mindset position him as a leading figure in the electronics industry.

Collaborations

Throughout his career, Venkata Narayanan Srinivasan has collaborated with talented individuals such as Srinivas Dhulipalla and Manish Sharma. These partnerships enhance the development of cutting-edge technologies and foster a culture of innovation within their projects.

Conclusion

Venkata Narayanan Srinivasan's contributions to the field of electronics through his numerous patents exemplify his commitment to innovation and excellence. His work not only advances testing techniques but also highlights the importance of collaboration in achieving technological progress in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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