The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Sep. 15, 2022
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Mario Giuseppe Saggio, Aci Bonaccorsi, IT;

Alfio Guarnera, Trecastagni, IT;

Assignee:

STMICROELECTRONICS S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/04 (2006.01); H01L 21/761 (2006.01); H10D 12/01 (2025.01); H10D 30/66 (2025.01); H10D 62/10 (2025.01); H10D 62/832 (2025.01); H10D 84/00 (2025.01);
U.S. Cl.
CPC ...
H10D 84/141 (2025.01); H01L 21/046 (2013.01); H01L 21/761 (2013.01); H10D 12/031 (2025.01); H10D 30/665 (2025.01); H10D 62/107 (2025.01); H10D 62/8325 (2025.01);
Abstract

A silicon carbide power device has: a die having a functional layer of silicon carbide and an edge area and an active area, surrounded by the edge area; gate structures formed on a top surface of the functional layer in the active area; and a gate contact pad for biasing the gate structures. The device also has an integrated resistor having a doped region, of a first conductivity type, arranged at the front surface of the functional layer in the edge area; wherein the integrated resistor defines an insulated resistance in the functional layer, interposed between the gate structures and the gate contact pad.


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