Yokohama, Japan

Makoto Sekine

This inventor holds 34 USPTO granted patents and 1 published patent application, primarily in Semiconductor Processing. Top assignees: Kabushiki Kaisha Toshiba, Nagoya University, Tokyo Electron Limited. Active years: 1985-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Makoto Sekine. Retrieved from https://idiyas.com/inventor/makoto-sekine

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 34 

% Patents Active = 82.4

Average Co-Inventor Count = 3.4

ph-index = 17

Forward Citations = 1,297(Granted Patents)


Location History:

  • Kanagawa, JP (1989 - 2006)
  • Yokohama, JP (1985 - 2007)
  • Ibaraki, JP (2021)
  • Nagoya, JP (2013 - 2022)
  • Aichi, JP (2024)

Company Filing History:


Years Active: 1985-2024

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Areas of Expertise:
Semiconductor Device
Plasma Processing
Film Formation
Dry Etching
Thermal Diffusion
Charged Particle Detection
Electrostatic Chucking
Photomask Repair
Group-III Nitride
Reactive Gas Activation
Surface Processing
Manufacturing Method
34 patents (USPTO):Explore Patents

Title: Innovations of Makoto Sekine: A Pioneering Inventor in Semiconductor Technology

Introduction

Makoto Sekine is a distinguished inventor based in Yokohama, Japan, renowned for his significant contributions to semiconductor technology. With a remarkable portfolio of 34 patents, Sekine has played an essential role in advancing the field of materials used in semiconductor manufacturing.

Latest Patents

Sekine's latest patents showcase his innovative approaches to addressing challenges in semiconductor fabrication. One notable patent details a carbon hard mask, which is laminated on an etching target film. This hard mask is unique in that it maintains a concentration ratio of methylene groups (CH) and methyl groups (CH) that satisfies the critical expression CH/(CH + CH) ≥ 0.5. This development aids in improving the efficiency and effectiveness of semiconductor processing.

Another significant patent describes a method for manufacturing a semiconductor substrate featuring a patterned group-III nitride compound layer. This method is remarkable as it prevents the collapse of the formed mask pattern during high-temperature etching processes ranging from 300°C to 700°C. The innovative steps include forming a patterned mask layer on the substrate's group-III nitride compound layer and utilizing dry etching techniques to achieve precise patterns, employing polymers outlined in specific formulas to ensure structural integrity.

Career Highlights

Throughout his impressive career, Makoto Sekine has been associated with prestigious companies, including Kabushiki Kaisha Toshiba and Tokyo Electron Limited. His work with these organizations has significantly impacted the development and manufacturing processes of semiconductor technologies, allowing for greater advancements in the industry.

Collaborations

Sekine's contributions have often been bolstered through collaborations with esteemed colleagues such as Haruo Okano and Yasuhiro Horiike. These partnerships have facilitated the sharing of ideas and expertise, leading to innovative solutions that address the ever-evolving challenges within semiconductor manufacturing.

Conclusion

Makoto Sekine stands out as a pivotal figure in the realm of semiconductor innovations. His 34 patents reflect a commitment to excellence and a deep understanding of the complexities involved in semiconductor fabrication. As the industry continues to evolve, Sekine's inventions are likely to influence future developments and inspire the next generation of inventors in the technology sector.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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