Kabushiki Kaisha Toshiba

Tokyo Electron Limited

Nagoya University

Other

Nec Electronics Corporation

Nissan Chemical Corporation

Tokai National Higher Education and Research System

Tokyo Electron Yamanashi Limited

Betel Co. Ltd.

Makoto Sekine

Haruo Okano

Yasuhiro Horiike

Katsuya Okumura

Naofumi Nakamura

Masaru Hori

Keiji Horioka

Shoji Seta

Sadahisa Noguchi

Motosuke Miyoshi

Isahiro Hasegawa

Tsunetoshi Arikado

Masaki Narita

Hitoshi Itoh

Yukimasa Yoshida

Itsuko Sakai

Hirotaka Toyoda

Tsuyoshi Moriya

Satoshi Tanaka

Nobuo Hayasaka

Hisashi Kaneko

Yuichiro Yamazaki

Takashi Ishigami

Nozomu Harada

Keisuke Hashimoto

Kazuhiro Tomioka

Kazuyoshi Sugihara

Kazuyoshi Ueno

Takayuki Sakai

Yasunobu Someya

Masahiro Ogasawara

Hidenori Miyoshi

Ichiro Mori

Manabu Iguchi

Shingo Kanamitsu

Koichiro Inazawa

Kei Hattori

Masaaki Hatano

Soichi Yamashita

Kouichiro Inazawa

Takashi Yoda

Yoshio Ishikawa

Takashi Hirano

Tomoki Suemasa

Fumiaki Shigemitsu

Tadashi Mitsui

Yoshinori Morisada

Tetsuya Kurokawa

Tsuyoshi Ono

Kazuo Eguchi

Kimihito Hatori

Ryuji Tomita

Hiroshi Ikenoue

Haruka Suzuki

Takahiko Kubota

Hosei Nagano

Ryohei Fujita

Takaaki Awano

Hirotsugu Sugiura

According to one embodiment, there is provided a carbon hard mask laminated on an etching target film, in which the concentration ratio of a methylene group CHand a methyl group CHcontained in the carbon hard mask satisfies the expression CH/(CH+CH)≥0.5.

Carbon hard mask, film forming apparatus, and film forming method

A method for manufacturing a semiconductor substrate having a patterned group-III nitride compound layer without collapsing a formed mask pattern due to reflow or decomposition even when an etching method at a high temperature of 300&#xb0; C.-700&#xb0; C. is used, including the steps: forming a patterned mask layer on the substrate's group-III nitride compound layer, and etching the group-III nitride compound layer by dry etching at 300&#xb0; C. or higher and 700&#xb0; C. or lower using the mask pattern, to form patterned group-III nitride compound layer, wherein the patterned mask layer contains a polymer containing a unit structure of the following Formula (1): a polymer containing a unit structure of the following Formula (2):O&#x2014;Ar&#x2003;&#x2003;Formula (2)a polymer containing a structural unit of the following Formula (3):O&#x2014;Ar&#x2014;O&#x2014;Ar-T-Ar&#x2003;&#x2003;Formula (3)a polymer containing a combination of unit structure of Formula (2) and unit structure of Formula (3), or a crosslinked structure of the polymers.

Method for manufacturing semiconductor substrate having group-III nitride compound layer

To provide a thermal diffusion factor measurement device, a thermal diffusion factor measurement method and a program capable of measuring thermal diffusion with high accuracy, even when an object to be measured has anisotropy in which thermal diffusion factors differ greatly between the in-plane direction and the thickness direction and a thick thickness. In a thermal diffusion factor measurement method, a heating location H on a tabular sample is made to generate periodically varying thermal waves and the thermal waves at a detection location S on the sample are detected by a non-contact temperature sensor. In addition, the phase delay of the thermal waves at the detection location S is detected in consideration of a detection sensitivity distribution DS of the non-contact temperature sensor and the thermal diffusion factor in the in-plane direction of the sample is measured using the phase delay.

Thermal diffusion factor measurement device, thermal diffusion factor measurement method and program

A microwave supply apparatus includes a waveguide, a circulator, and a matcher, a first port of the circulator receives a microwave from an input end. First and second ends of the waveguide are coupled to second and third ports of the circulator, respectively. The matcher is provided between the input end and the first port of the circulator. The waveguide includes a rectangular waveguide having first and second walls facing each other, and third and fourth walls facing each other. A slot hole is formed in the first wall, and the slot hole is provided at a region deviated to the third wall side. The waveguide includes a first ridge portion provided therein. The first ridge portion faces the slot hole, is in contact with the second wall and third wall, and is separated from the first wall and fourth wall.

Microwave supply apparatus, plasma processing apparatus, and plasma processing method

An apparatus for generating plasma, comprises: a microwave generator configured to generate a microwave; a wave guide which is connected to the microwave generator, wherein the wave guide is elongated in a traveling direction of the microwave and has a hollow shape having a rectangular section in a direction perpendicular to the traveling direction; a gas feeder which is connected to the wave guide and feeds process gas into the wave guide; and an antenna unit which is a part of the wave guide and discharges plasma generated by the microwave to the outside, wherein the antenna unit has one or more slots formed on a wall constituting a short side in a section of the antenna unit, plasmarizes the process gas fed into the wave guide under an atmospheric pressure in the slots by the microwave, and discharges the plasma out of the slots.

Plasma generating apparatus, plasma processing apparatus and plasma processing method

A method of producing a semiconductor device according to an aspect of the present invention comprises forming a seed film of Cu on a substrate; polycrystallizing the seed film formed on the substrate; and forming a plated film of Cu on the polycrystallized seed film by electrolytic plating.

Method of producing semiconductor device

Disclosed is a semiconductor device, comprising a first wiring structure formed on a semiconductor substrate and including a first plug and a first wiring formed on the first plug, and a second wiring structure formed on the semiconductor substrate belonging to the wiring layer equal to the first wiring structure and including a second plug and a second wiring formed on the second plug, wherein the upper surface of the first wiring is positioned higher than the upper surface of the second wiring, and the lower surface of the first wiring is positioned flush with or lower than the upper surface of the second wiring. The present invention also provides a method of manufacturing the particular semiconductor device.

Semiconductor device and manufacturing method of the same

A semiconductor device has a first guard ring surrounding a circuit region, a second ring disposed between the circuit region and the first guard ring, and first connections connecting the first guard ring and the second guard ring to each other. An area sandwiched between the first guard ring and the second guard ring is divided by the first connections into a plurality of subareas. Even if the first guard ring is partly defective, water enters from outside into only the subarea which is contiguous to the defective part of the first guard ring.

Semiconductor device with guard ring for preventing water from entering circuit region from outside

A photomask repair method including scanning an electron beam across a main surface of the photomask, thereby producing a pattern image of the photomask, identifying the position of a defective portion from the pattern image thus produced, and applying an electron beam to a region to be etched including a defective portion under an atmosphere of a gas capable of performing a chemical etching of a film material forming the photomask pattern, thereby removing a defect. In this method, the electron beam to be applied to the region to be etched is a shaped beam. The electron beam is set such that the side of the electron beam is applied in parallel to a borderline between a non-defective pattern and the defect.

Photomask repair method and apparatus

A semiconductor device comprises a semiconductor substrate having semiconductor elements integrally formed therein, a wiring layer formed on the surface of the semiconductor substrate, and a conductive connecting plug formed in a through-hole extending through the semiconductor substrate, wherein the connecting plug has a region whose cross section parallel to the upper surface of the semiconductor substrate has an area smaller than the area of each of upper and lower surfaces of the connecting plug.

Semiconductor device and method of manufacturing the same

In a processing chamber of an etching apparatus a lower electrode and an upper electrode grounded through a processing container are disposed oppositely to each other. A first high frequency power supply section composed of a first filter, a first matching device, and a first power source, and a second high frequency power supply section composed of a second filter, a second matching device, and a second power source are connected to the lower electrode. A superimposed power of two frequencies composed of a first high frequency power component of at least 10 MHz produced from the first power source and a second high frequency power component of at least 2 MHz produced from the second power source is applied to the lower electrode. Ions in the plasma do not accelerated by changes of electric field in the processing chamber, but are accelerated by a self-bias voltage and collide only against a wafer on the lower electrode.

Plasma processing method

There is provided a method of forming an interlayer insulating film having a dual-damascene structure, a contact hole and a deep trench mask using an organic silicon film. The shape of polysilane or the like is processed so that polysilane is used as an interlayer insulating film having a dual-damascene structure to control the shape and depth and prevent borderless etching which must be solved when a trench is formed. Polysilane and an insulating film are formed into a laminated structure so as to be integrated with each other after a dry etching step has been completed to easily form a contact hole having a high aspect ratio. The surface of polysilane is selectively formed into an insulating film so as to be used as a mask for use in a dry etching step. Polysilane for use as an anti-reflective film or an etching mask is changed to an oxide film or a nitride film so that films are easily removed. Hence it follows that a device region and a device isolation region of a densely integrated circuit can be smoothed, a self-aligned contact hole and metallization trench can be formed with a satisfactory manufacturing yield and the pattern of a gate electrode can be formed.

Manufacturing method of semiconductor devices by using dry etching technology

A semiconductor wafer etching system exhausts an exhaust gas including fluorocarbon gas to an exhaust line. Two traps, that are capable of trapping the fluorocarbon gas in the exhaust gas by cooled adsorption and releasing the adsorbed fluorocarbon gas by heating, are alternately arranged on the exhaust line. The two traps are alternately separated from the exhaust gas and regenerated on a regeneration line which serves to release the adsorbed fluorocarbon gas from the traps. The trap which is in the trap mode to adsorb the fluorocarbon gas is cooled to &minus;120&deg; C. or less. The trap which is in the regeneration mode to release the adsorbed fluorocarbon gas is heated to &minus;100&deg; C. or more.

Semiconductor processing system and method of using the same

Growing community of inventors

Yokohama, Japan

Makoto Sekine