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For the Inventor, By the Inventor

Singapore, Singapore

Lee-Wee Teo

This inventor holds 45 USPTO granted patents and 1 published patent application, primarily in Semiconductor Technology. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2012-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Lee-Wee Teo. Retrieved from https://idiyas.com/inventor/lee-wee-teo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 45 

% Patents Active = 66.7

Average Co-Inventor Count = 4.1

ph-index = 8

Forward Citations = 173(Granted Patents)


Location History:

  • Singapore, TW (2013)
  • Singanore, SG (2014)
  • Singapore, SG (2012 - 2021)

Company Filing History:

goldMedal45 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2012-2025

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Areas of Expertise:
Polysilicon Design
Semiconductor Device
ESD Protection
Transistor Fabrication
Inductor Coupling
Thermal Stability
Gate Resistance
Integrated Circuits
Contact Etch Stop
Silicon Germanium
Hybrid Device
Spacer Structures
45 patents (USPTO):Explore Patents
1. 12426333 - Polysilicon design for replacement gate technology (2025-09-23),
2. 11018241 - Polysilicon design for replacement gate technology (2021-05-25),
3. 10658492 - Polysilicon design for replacement gate technology (2020-05-19),
4. 10403736 - Polysilicon design for replacement gate technology (2019-09-03),
5. 10084061 - Polysilicon design for replacement gate technology (2018-09-25),
6. 9929251 - Polysilicon design for replacement gate technology (2018-03-27),
7. 9780180 - Semiconductor device with partially unsilicided source/drain (2017-10-03),
8. 9679988 - Polysilicon design for replacement gate technology (2017-06-13),
9. 9620620 - Methods to stop contact metal from extruding into replacement gates (2017-04-11),
10. 9577051 - Spacer structures of a semiconductor device (2017-02-21),
11. 9525040 - Method of fabricating hybrid impact-ionization semiconductor device (2016-12-20),
12. 9478633 - Method and apparatus of forming ESD protection device (2016-10-25),
13. 9412841 - Method of fabricating a transistor using contact etch stop layers (2016-08-09),
14. 9299696 - Semiconductor structure with suppressed STI dishing effect at resistor region (2016-03-29),
15. 9231084 - Method of forming laterally diffused metal oxide semiconductor transistor with partially unsilicided source/drain (2016-01-05),

Title: The Innovative Journey of Lee-Wee Teo

Introduction:

Lee-Wee Teo, a visionary inventor hailing from Singapore, SG, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

Lee-Wee Teo's latest patents include cutting-edge advancements in artificial intelligence algorithms for autonomous vehicles and smart home systems, showcasing his commitment to revolutionizing everyday life through technology.

Career Highlights:

With a career spanning over two decades, Lee-Wee Teo has held key positions in leading tech companies, where he spearheaded research and development projects that have resulted in numerous successful patents and products. His expertise in machine learning and robotics has earned him recognition as a pioneer in the industry.

Collaborations:

Throughout his career, Lee-Wee Teo has collaborated with top researchers, engineers, and designers from around the world to bring his innovative ideas to life. His ability to work seamlessly in multidisciplinary teams has led to the creation of groundbreaking technologies that have reshaped various industries.

Conclusion:

In conclusion, Lee-Wee Teo's relentless passion for innovation and his dedication to pushing the boundaries of technology have solidified his position as a prominent figure in the world of inventors. His contributions continue to inspire future generations of innovators to think boldly and create fearlessly.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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