The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

May. 24, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Harry-Hak-Lay Chuang, Singapore, SG;

Kong-Beng Thei, Hsin-Chu, TW;

Sheng-Chen Chung, Tainan, TW;

Chiung-Han Yeh, Tainan, TW;

Lee-Wee Teo, Singapore, SG;

Yu-Ying Hsu, Pingzhen, TW;

Bao-Ru Young, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 23/62 (2006.01); H10D 1/47 (2025.01); H10D 30/01 (2025.01); H10D 30/60 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/80 (2025.01); H10D 84/85 (2025.01); H10D 84/00 (2025.01);
U.S. Cl.
CPC ...
H10D 64/017 (2025.01); H10D 1/47 (2025.01); H10D 30/0227 (2025.01); H10D 30/601 (2025.01); H10D 84/0177 (2025.01); H10D 84/038 (2025.01); H10D 84/811 (2025.01); H10D 84/856 (2025.01); H01L 23/62 (2013.01); H01L 2223/6672 (2013.01); H10D 84/209 (2025.01);
Abstract

The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate; and a passive polysilicon device disposed over the semiconductor substrate. The passive polysilicon device further includes a polysilicon feature; and a plurality of electrodes embedded in the polysilicon feature.


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