Kerstin Ruttloff

This inventor holds 12 USPTO granted patents and 1 published patent application. Top assignees: Globalfoundries Inc., Advanced Micro Devices Corporation. Active years: 2011-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kerstin Ruttloff. Retrieved from https://idiyas.com/inventor/kerstin-ruttloff

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 12 (Patent Applications = 1)

% Patents Active = 83.3

Average Co-Inventor Count = 4.2

ph-index = 3

Forward Citations = 118(Granted Patents)

Company Filing History:

Advanced Micro Devices Corporation

patents

Years Active: 2011-2015

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12 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8987103 - Multi-step deposition of a spacer material for reducing void formation in a dielectric material of a contact level of a semiconductor device (2015-03-24),

2. 8772843 - Oxide deposition by using a double liner approach for reducing pattern density dependence in sophisticated semiconductor devices (2014-07-08),

3. 8709902 - Sacrificial spacer approach for differential source/drain implantation spacers in transistors comprising a high-k metal gate electrode structure (2014-04-29),

4. 8440534 - Threshold adjustment for MOS devices by adapting a spacer width prior to implantation (2013-05-14),

5. 8436425 - SOI semiconductor device comprising substrate diodes having a topography tolerant contact structure (2013-05-07),

6. 8318598 - Contacts and vias of a semiconductor device formed by a hard mask and double exposure (2012-11-27),

7. 8188871 - Drive current adjustment for transistors by local gate engineering (2012-05-29),

8. 8110487 - Method of creating a strained channel region in a transistor by deep implantation of strain-inducing species below the channel region (2012-02-07),

9. 8097542 - Etch stop layer of reduced thickness for patterning a dielectric material in a contact level of closely spaced transistors (2012-01-17),

10. 8048726 - SOI semiconductor device with reduced topography above a substrate window area (2011-11-01),

11. 8039338 - Method for reducing defects of gate of CMOS devices during cleaning processes by modifying a parasitic PN junction (2011-10-18),

12. 7981740 - Enhanced cap layer integrity in a high-K metal gate stack by using a hard mask for offset spacer patterning (2011-07-19),

Title: The Innovative Contributions of Kerstin Ruttloff

Introduction

Kerstin Ruttloff is a prominent inventor based in Hainichen, Germany. She has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. Her work focuses on enhancing the performance and reliability of advanced semiconductor devices.

Latest Patents

One of her latest patents is titled "Multi-step deposition of a spacer material for reducing void formation in a dielectric material of a contact level of a semiconductor device." This invention addresses the challenges of spacer element formation by utilizing a multi-station deposition technique. By varying the thickness of the sub-layers of spacer materials, Ruttloff aims to improve etch conditions during the anisotropic etch process. This innovation leads to better-shaped spacer elements, which ultimately enhances deposition conditions and reduces yield losses in densely packed device areas, such as static RAM areas.

Another notable patent is "Oxide deposition by using a double liner approach for reducing pattern density dependence in sophisticated semiconductor devices." In this invention, Ruttloff introduces a silicon dioxide material in the form of a double liner, combining undoped silicon dioxide with high-density plasma silicon dioxide. This approach reduces dependency on pattern density and can be utilized as both a spacer material and a hard mask material in process strategies for incorporating strain-inducing semiconductor materials.

Career Highlights

Throughout her career, Kerstin Ruttloff has worked with leading companies in the semiconductor industry, including Globalfoundries Inc. and Advanced Micro Devices Corporation. Her expertise and innovative mindset have positioned her as a key player in the development of advanced semiconductor technologies.

Collaborations

Kerstin has collaborated with notable colleagues such as Kai Frohberg and Markus Lenski, contributing to the advancement of semiconductor research and development.

Conclusion

Kerstin Ruttloff's contributions to semiconductor technology through her innovative patents and collaborations highlight her significant role in the industry. Her work continues to influence the development of more efficient and reliable semiconductor devices.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: