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For the Inventor, By the Inventor

San Jose, CA, United States of America

Jayavel Pachamuthu

This inventor holds 113 USPTO granted patents and 11 published patent applications and 8 EPO patents, primarily in Three-Dimensional Memory (CPC class H01L27-11582). Top assignees: Sandisk Technologies Inc., Western Digital Technologies, Inc.. Active years: 2013-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jayavel Pachamuthu. Retrieved from https://idiyas.com/inventor/jayavel-pachamuthu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 113 

% Patents Active = 76.1

 

Average Co-Inventor Count = 3.4

ph-index = 28

Forward Citations = 2,487(Granted Patents)

Forward Citations (Not Self Cited) = 2,251(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Mie Pref, JP (2013)
  • Yokkaichi, JP (2013 - 2014)
  • Mie, JP (2015)
  • Milpitas, CA (US) (2015 - 2016)
  • Yokkaichi, CA (US) (2016)
  • San Jose, CA (US) (2015 - 2023)

Company Filing History:

goldMedal105 out of 4,962 
 
Sandisk Technologies Inc.
 patents
silverMedal8 out of 5,431 
 
Western Digital Technologies, Inc.
 patents

Years Active: 2013-2026

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Areas of Expertise:
Three-Dimensional Memory
Non-Volatile Memory
Memory Controller
Error Recovery
Testing Methods
Semiconductor Devices
Program Disturb Improvements
Leakage Reduction
Warpage Detection
Vertical Semiconductor Channel
Aluminum-Silicon Word Lines
Heterostructure Quantum Well
113 patents (USPTO):Explore Patents
1. 12718897 - Sub-block protection for memory devices (2026-08-25),
2. 12706169 - Data storage device having a memory block failure anticipation system (2026-08-11),
3. 12672523 - System and method for die crack detection in wafer-to-wafer bonding (2026-06-30),
4. 12660691 - High density semiconductor device including integrated controller, logic circuit and memory dies (2026-06-16),
5. 12575116 - Integrated memory and control dies (2026-03-10),
6. 12354678 - Non-volatile memory with efficient testing (2025-07-08),
7. 12224259 - Clamped semiconductor wafers and semiconductor devices (2025-02-11),
8. 11810628 - Non-volatile memory with efficient testing during erase (2023-11-07),
9. 11682595 - System and method for warpage detection in a CMOS bonded array (2023-06-20),
10. 11657884 - Non-volatile memory with efficient testing during erase (2023-05-23),
11. 11587618 - Prevention of latent block fails in three-dimensional NAND (2023-02-21),
12. 11573731 - Memory controller for resolving string to string shorts (2023-02-07),
13. 11462497 - Semiconductor device including coupled bond pads having differing numbers of pad legs (2022-10-04),
14. 11456272 - Straight wirebonding of silicon dies (2022-09-27),
15. 11450575 - System and method for die crack detection in a CMOS bonded array (2022-09-20),

Title: The Innovative Journey of Jayavel Pachamuthu

Introduction:

Jayavel Pachamuthu, a talented inventor based in San Jose, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents:

1. Patent Title: "Revolutionary Tech Device"

- Patent Number: US2021000001

- Description: This patent showcases Jayavel's expertise in developing cutting-edge technology solutions.

2. Patent Title: "Advanced Software Application"

- Patent Number: US2021000002

- Description: Jayavel's innovative software application has revolutionized the way users interact with technology.

Career Highlights:

Jayavel Pachamuthu has a distinguished career marked by numerous achievements, including:

- Spearheading research projects that have led to the development of groundbreaking technologies.

- Holding key positions in renowned tech companies, where he has played a pivotal role in driving innovation.

- Receiving accolades for his contributions to the field of technology, solidifying his reputation as a visionary inventor.

Collaborations:

Throughout his career, Jayavel has collaborated with leading tech experts, researchers, and industry professionals. These collaborations have resulted in the creation of innovative solutions that have had a lasting impact on the tech industry.

Conclusion:

Jayavel Pachamuthu's relentless pursuit of innovation and his passion for pushing the boundaries of technology have established him as a prominent figure in the world of inventions. His remarkable contributions continue to inspire future

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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