The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Apr. 26, 2022
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Jayavel Pachamuthu, San Jose, CA (US);

Dana Lee, Saratoga, CA (US);

Jiahui Yuan, Fremont, CA (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3445 (2013.01); G11C 16/08 (2013.01); G11C 16/102 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01);
Abstract

A non-volatile memory system performs an erase process followed by a program process to program blocks of memory cells. The erase process comprises erasing followed by erase verification. The system recovers data and records a strike for blocks that fail a read process. In response to a particular block having a strike, the system performs an odd/even compare process during the erase process for the particular blocks having the strike such that the odd/even compare process comprises determining whether a number of memory cells connected to even word lines that have a different erase verify result than memory cells connected to odd word lines is greater than a defect test threshold. The system retires blocks from further use for storing host data that fail the odd/even compare process even if the block passes erase verification.


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