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For the Inventor, By the Inventor

Hsinchu, Taiwan

Hsun-Chih Tsao

This inventor holds 15 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2001-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hsun-Chih Tsao. Retrieved from https://idiyas.com/inventor/hsun-chih-tsao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15

% Patents Active = 60.0

Average Co-Inventor Count = 4.1

ph-index = 6

Forward Citations = 125(Granted Patents)


Location History:

  • Taipei, TW (2001)
  • Hsun-Chu, TW (2006)
  • Hsin Chu, TW (2004 - 2010)

Company Filing History:

goldMedal15 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2001-2010

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15 patents (USPTO):Explore Patents
1. 7663185 - FIN-FET device structure formed employing bulk semiconductor substrate (2010-02-16),
2. 7638376 - Method for forming SOI device (2009-12-29),
3. 7633127 - Silicide gate transistors and method of manufacture (2009-12-15),
4. 7538351 - Method for forming an SOI structure with improved carrier mobility and ESD protection (2009-05-26),
5. 7332777 - STI liner for SOI structure (2008-02-19),
6. 7205601 - FinFET split gate EEPROM structure and method of its fabrication (2007-04-17),
7. 7183150 - Resist protect oxide structure of sub-micron salicide process (2007-02-27),
8. 7067379 - Silicide gate transistors and method of manufacture (2006-06-27),
9. 7053453 - Substrate contact and method of forming the same (2006-05-30),
10. 7026196 - Method of forming field effect transistor and structure formed thereby (2006-04-11),
11. 6979867 - SOI chip with mesa isolation and recess resistant regions (2005-12-27),
12. 6955955 - STI liner for SOI structure (2005-10-18),
13. 6864149 - SOI chip with mesa isolation and recess resistant regions (2005-03-08),
14. 6815274 - Resist protect oxide structure of sub-micron salicide process (2004-11-09),
15. 6191018 - Method for selective resistivity adjustment of polycide lines for enhanced design flexibility and improved space utilization in sub-micron integrated circuits (2001-02-20),

Title: Inventor Hsun-Chih Tsao

Introduction: Hsun-Chih Tsao is a renowned inventor based in Hsin-Chu, Taiwan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Hsun-Chih Tsao holds several patents in various technological domains, showcasing his continuous dedication to advancing the industry.

Career Highlights: Throughout his illustrious career, Hsun-Chih Tsao has been instrumental in developing cutting-edge technologies that have revolutionized the way we interact with the world around us.

Collaborations: Hsun-Chih Tsao has collaborated with leading tech companies and research institutions, further solidifying his reputation as a visionary inventor with a keen eye for innovation.

Conclusion: In conclusion, Hsun-Chih Tsao's innovative spirit and relentless pursuit of technological advancement have cemented his legacy as a pioneering inventor in the realm of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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