Heverlee, Belgium

Georgios Vellianitis

This inventor holds 125 USPTO granted patents and 43 published patent applications, primarily in Semiconductor Technology (CPC class H01L29-66795). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2012-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Georgios Vellianitis. Retrieved from https://idiyas.com/inventor/georgios-vellianitis

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 125 

% Patents Active = 85.6

Average Co-Inventor Count = 2.2

ph-index = 6

Forward Citations = 722(Granted Patents)

Forward Citations (Not Self Cited) = 644(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Redhill Surrey, GB (2014)
  • Belgium, DE (2016)
  • Redhill, GB (2016)
  • Hsinchu, TW (2023)
  • Heverlee, BE (2012 - 2024)
  • Haverlee, BE (2022 - 2024)

Company Filing History:


Years Active: 2012-2026

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Areas of Expertise:
Ferroelectric Memory
Field Effect Transistor
Transistor Design
Metal Oxide Barrier
Semiconductor Structure
Multigate Device
Localized Heating
Hydrogen-Mediated Modulation
Thin Film Transistor
Laser Annealing
Crystalline Raised Regions
125 patents (USPTO):Explore Patents

Title: The Innovative Journey of Georgios Vellianitis

Introduction

Georgios Vellianitis, based in Heverlee, Belgium, is a prominent figure in the field of semiconductor technology. With an impressive portfolio of 108 patents, Vellianitis has made significant contributions that have advanced the industry. His inventions focus on novel semiconductor structures and their manufacturing processes, showcasing his expertise and innovative thinking.

Latest Patents

Among his latest patents, Vellianitis has developed groundbreaking concepts, including a semiconductor structure featuring a thin film transistor. This invention provides detailed methods for creating semiconductor structures that comprise an interconnect structure, electrode layer, gate dielectric layer, and oxide semiconductor layer, along with an indium-containing feature and a source/drain contact. Another notable patent involves a method of manufacturing a field effect transistor (FET) using carbon nanotubes (CNTs). This process emphasizes the formation of a gate-all-around FET through various intricate steps, including the creation of a fin structure with stacked dielectric layers and CNTs, ultimately leading to a sophisticated source/drain contact layer.

Career Highlights

Georgios Vellianitis has established a remarkable career at Taiwan Semiconductor Manufacturing Company Limited, where he continually pushes the boundaries of semiconductor technologies. His relentless pursuit of innovation has positioned him as a leading inventor in the semiconductor field, recognized for his technical acumen and the commercial viability of his inventions.

Collaborations

Throughout his career, Vellianitis has collaborated with talented individuals like Gerben Doornbos and Marcus Johannes Henricus Van Dal. These partnerships have fostered a rich environment of shared knowledge and creativity, driving further advancements in their collective work.

Conclusion

Georgios Vellianitis exemplifies the spirit of innovation in the semiconductor industry. His extensive patent portfolio and noteworthy collaborations underline his essential role in the advancement of semiconductor technology. As he continues to develop new solutions, Vellianitis remains an inspiration for aspiring inventors and engineers alike.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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