The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Jun. 16, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Georgios Vellianitis, Heverlee, BE;

Oreste Madia, Brussels, BE;

Gerben Doornbos, Kessel-Lo, BE;

Marcus Johannes Henricus Van Dal, Linden, BE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/768 (2006.01); H10D 30/62 (2025.01); H10D 30/67 (2025.01); H10D 64/23 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H01L 21/3086 (2013.01); H01L 21/02112 (2013.01); H01L 21/30604 (2013.01); H10D 30/6735 (2025.01); H10D 64/252 (2025.01); H01L 21/76897 (2013.01); H10D 30/62 (2025.01); H10D 64/017 (2025.01); H10D 64/2523 (2025.01);
Abstract

A method includes forming first sacrificial layers and first channel layers alternately stacked over a substrate; forming second channel layers and second sacrificial layers alternately stacked over the first sacrificial layers and the first channel layers, in which the second channel layers are made of a first semiconductive oxide; performing an etching process to remove portions of the first sacrificial layers and the second sacrificial layers; forming a gate structure in contact with the first channel layers and the second channel layers; forming first source/drain contacts on opposite sides of the gate structure and electrically connected to the first channel layers; and forming second source/drain contacts on the opposite sides of the gate structure and electrically connected to the second channel layers.


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