Santa Clara, CA, United States of America

Edward Franklin Runnion


Average Co-Inventor Count = 5.9

ph-index = 8

Forward Citations = 196(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2004 - 2009)
  • San Jose, CA (US) (2011)

Company Filing History:


Years Active: 2004-2011

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14 patents (USPTO):

Title: The Innovations of Edward Franklin Runnion

Introduction

Edward Franklin Runnion is a notable inventor based in Santa Clara, California. He has made significant contributions to the field of memory technology, holding a total of 14 patents. His work focuses on enhancing the performance and reliability of memory devices, particularly in reducing charge loss and improving data integrity.

Latest Patents

Runnion's latest patents include innovative methods for applying negative gate voltage to wordlines adjacent to a selected wordline during read or verify operations. This technology aims to reduce adjacent wordline disturb, thereby maintaining a desired operation window and minimizing voltage threshold shifts. Another significant patent involves algorithms for charge loss reduction and threshold voltage distribution improvement in memory cells. This method is particularly beneficial for multi-level flash memory cells, as it enhances data reliability while programming or erasing memory cells.

Career Highlights

Throughout his career, Runnion has worked with prominent companies in the technology sector, including Advanced Micro Devices Corporation and Spansion LLC. His expertise in memory technology has positioned him as a key contributor to advancements in this field.

Collaborations

Runnion has collaborated with notable professionals such as Mark W. Randolph and Yi He, further enriching his contributions to the industry.

Conclusion

Edward Franklin Runnion's innovative work in memory technology has led to significant advancements that enhance the performance and reliability of memory devices. His contributions continue to impact the field positively.

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