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For the Inventor, By the Inventor

Escondido, CA, United States of America

Brian Matthew Henderson

This inventor holds 23 USPTO granted patents and 5 published patent applications and 8 EPO patents, primarily in Semiconductor Technology. Top assignees: Qualcomm Incorporated, Burroughs, Inc.. Active years: 1987-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Brian Matthew Henderson. Retrieved from https://idiyas.com/inventor/brian-matthew-henderson

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23 

% Patents Active = 73.9

 

Average Co-Inventor Count = 3.1

ph-index = 7

Forward Citations = 365(Granted Patents)


Location History:

  • San Diego, CA (US) (2012 - 2015)
  • Escondido, CA (US) (1987 - 2016)

Company Filing History:

goldMedal22 out of 44,831 
 
Qualcomm Incorporated
 patents
silverMedal1 out of 1,222 
 
Burroughs, Inc.
 patents

Years Active: 1987-2016

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Areas of Expertise:
Electrostatic Discharge
Stacked Memory Elements
Wafer Bonding
CMOS Integration
Three Dimensional Inductor
Radio Frequency Amplifier
Interconnect Sensor
Integrated Circuits
Die-to-Die Bonding
Circuit Measurement
Magnetic Film Inductor
Active Device Placement
23 patents (USPTO):Explore Patents
1. 9379201 - Electrostatic discharge diodes and methods of forming electrostatic discharge diodes (2016-06-28),
2. 9190201 - Magnetic film enhanced inductor (2015-11-17),
3. 9184130 - Electrostatic protection for stacked multi-chip integrated circuits (2015-11-10),
4. 9153461 - Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device (2015-10-06),
5. 9093462 - Electrostatic discharge diode (2015-07-28),
6. 9041220 - Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device (2015-05-26),
7. 8912043 - Dual-side interconnected CMOS for stacked integrated circuits (2014-12-16),
8. 8618539 - Interconnect sensor for detecting delamination (2013-12-31),
9. 8604626 - Reduced susceptibility to electrostatic discharge during 3D semiconductor device bonding and assembly (2013-12-10),
10. 8557680 - Semiconductor wafer-to-wafer bonding for dissimilar semiconductor dies and/or wafers (2013-10-15),
11. 8536893 - Circuit for measuring magnitude of electrostatic discharge (ESD) events for semiconductor chip bonding (2013-09-17),
12. 8525342 - Dual-side interconnected CMOS for stacked integrated circuits (2013-09-03),
13. 8508301 - Three dimensional inductor, transformer and radio frequency amplifier (2013-08-13),
14. 8362599 - Forming radio frequency integrated circuits (2013-01-29),
15. 8354300 - Reducing susceptibility to electrostatic discharge damage during die-to-die bonding for 3-D packaged integrated circuits (2013-01-15),

Title: Brian Matthew Henderson: Pioneering Inventor from Escondido

Introduction: Brian Matthew Henderson is a distinguished inventor based in Escondido, California. With a passion for innovation and a keen eye for problem-solving, he has made significant contributions to various fields through his inventive spirit.

Latest Patents: Brian Henderson's latest patents focus on sustainable energy solutions, including a groundbreaking solar panel design that increases energy efficiency by 30%.

Career Highlights: Throughout his career, Brian Henderson has been recognized for his groundbreaking inventions, including a patented water purification system that has provided clean drinking water to remote communities around the world.

Collaborations: Brian Henderson has collaborated with leading research institutions and universities to further develop his inventions, showcasing his commitment to advancing technology for the greater good.

Conclusion: Brian Matthew Henderson's dedication to innovation and his remarkable contributions to the field of sustainable technology make him a standout inventor in Escondido, California.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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