The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Nov. 11, 2011
Applicants:

Jonghae Kim, San Diego, CA (US);

Shiqun Gu, San Diego, CA (US);

Brian Matthew Henderson, Escondido, CA (US);

Thomas R. Toms, San Diego, CA (US);

Lew G. Chua-eoan, Carlsbad, CA (US);

Seyfollah S. Bazarjani, San Diego, CA (US);

Matthew Nowak, San Diego, CA (US);

Inventors:

Jonghae Kim, San Diego, CA (US);

Shiqun Gu, San Diego, CA (US);

Brian Matthew Henderson, Escondido, CA (US);

Thomas R. Toms, San Diego, CA (US);

Lew G. Chua-Eoan, Carlsbad, CA (US);

Seyfollah S. Bazarjani, San Diego, CA (US);

Matthew Nowak, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.


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