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For the Inventor, By the Inventor

San Jose, CA, United States of America

Akash Agrawal

USPTO Granted Patents = 14 

 

Average Co-Inventor Count = 5.7

ph-index = 2

Forward Citations = 83(Granted Patents)


Company Filing History:

goldMedal12 out of 1,855 
 
Adeia Semiconductor Bonding Technologies Inc.
 patents
silverMedal1 out of 13,713 
 
Applied Materials, Inc.
 patents
bronzeMedal1 out of 32,513 
 
Google Inc.
 patents

Years Active: 2016-2025

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14 patents (USPTO):Explore Patents
1. 12450518 - Evaluating on-device machine learning model(s) based on performance measures of client device(s) and/or the on-device machine learning model(s) (2025-10-21),
2. 12278172 - Substrate frame design for three-dimensional stacked electronic assemblies and method for the same (2025-04-14),
3. 10790222 - Bonding of laminates with electrical interconnects (2020-09-29),
4. 10354945 - Multi-surface edge pads for vertical mount packages and methods of making package stacks (2019-07-16),
5. 10283445 - Bonding of laminates with electrical interconnects (2019-05-07),
6. 10008469 - Wafer-level packaging using wire bond wires in place of a redistribution layer (2018-06-26),
7. 9859234 - Methods and structures to repair device warpage (2018-01-02),
8. 9847238 - Fan-out wafer-level packaging using metal foil lamination (2017-12-19),
9. 9824974 - Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies (2017-11-21),
10. 9728524 - Enhanced density assembly having microelectronic packages mounted at substantial angle to board (2017-08-08),
11. 9646946 - Fan-out wafer-level packaging using metal foil lamination (2017-05-09),
12. 9548273 - Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies (2017-01-17),
13. 9543277 - Wafer level packages with mechanically decoupled fan-in and fan-out areas (2017-01-10),
14. 9502372 - Wafer-level packaging using wire bond wires in place of a redistribution layer (2016-11-22),

Title: The Innovative Journey of Akash Agrawal

Introduction: Akash Agrawal, a visionary inventor based in San Jose, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Akash Agrawal holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies, showcasing his versatility and forward-thinking approach.

Career Highlights: With a background in computer science and engineering, Akash Agrawal has worked for top tech companies in Silicon Valley, where he honed his skills and developed a passion for creating cutting-edge solutions.

Collaborations: Throughout his career, Akash Agrawal has collaborated with leading researchers, engineers, and scientists to bring his ideas to life, resulting in successful projects that have had a lasting impact on the industry.

Conclusion: Akash Agrawal's relentless pursuit of innovation and his commitment to pushing the boundaries of technology make him a true trailblazer in the world of inventions. His work continues to inspire and shape the future of technological advancements.

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