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Milpitas, CA, United States of America

Integrated Silicon Solution Incorporated

USPTO Granted Patents = 100

% Expired Patents = 4.0

EPO Patents = 8

Trademarks = 6

Forward Citations = 1,047

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80 inventors (with patents filed for the assignee):

Paul Cheng (10 out of 12 patents)

Nelson L Chow (9 out of 9 patents)

Paul Jei-Zen Song (9 out of 13 patents)

4. Yong H Jiang (8 out of 9 patents)

5. Seong Jun Jang (7 out of 8 patents)

6. Kyoung Chon Jin (7 out of 7 patents)

7. Sun Byeong Yoon (6 out of 6 patents)

8. Hsi-Hsien Hung (5 out of 6 patents)

9. Seung Cheol Bae (4 out of 4 patents)

10. Kwang Kyung Lee (4 out of 4 patents)

11. Sung Jin Yoo (4 out of 6 patents)

12. Fangli Chien (4 out of 6 patents)

13. Justin Kim (4 out of 4 patents)

14. Geun-Young Park (4 out of 6 patents)

15. Eungjoon Park (4 out of 27 patents)

Core Competencies:

Memory Device

Flash Memory

Error Correction

Low-Power Circuit

High-Speed Programming

Content Addressable Memory

Dynamic Random Access Memory

Voltage Regulator

Charge Pump

Wafer-Bonding

Sensing Margin

Calibration Circuit

100 patents: Sort by Forward Citations

1. 12266418 - Memory device having row driver circuits for reducing leakage currents during power off (2025-04-01),

2. 12260930 - Memory core characteristic screening method and system thereof (2025-03-25),

3. 12237669 - Semiconductor integrated circuit (2025-02-25),

4. 12183411 - Memory interface circuitry and built-in self-testing method (2024-12-31),

5. 12119041 - Signal synchronization adjustment method and signal synchronization adjustment circuit (2024-10-15),

6. 12021059 - Wafer-bonding structure and method of forming thereof (2024-06-25),

7. 11951571 - Method of forming package structure (2024-04-09),

8. 11894043 - Power management circuit in low-power double data rate memory and management method thereof (2024-02-06),

9. 11841722 - Controlling circuit for low-power low dropout regulator and controlling method thereof (2023-12-12),

10. 11616145 - FINFET stack gate memory and method of forming thereof (2023-03-28),

11. 11612965 - Method of forming package structure (2023-03-28),

12. 11378620 - Method and system for detecting abnormal die (2022-07-05),

13. 11195592 - Memory inspecting method and memory inspecting system (2021-12-07),

14. 11115006 - Internal latch circuit and method for generating latch signal thereof (2021-09-07),

15. 10832747 - Clocked commands timing adjustments method in synchronous semiconductor integrated circuits (2020-11-10),

Company Overview

Integrated Silicon Solution Incorporated, headquartered in Milpitas, California, specializes in advanced memory technology solutions. The company develops and manufactures a range of memory devices, including Flash memory, Dynamic Random Access Memory (DRAM), and Content Addressable Memory (CAM). Their expertise extends to low-power circuits, high-speed programming, and error correction technologies, catering to diverse applications across various industries. ISSI is committed to delivering innovative memory solutions that enhance performance and efficiency.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

100 Patents

#27 in Milpitas, CA

#868 in California

#3,795 in US

#7,778 in the World

Milpitas, CA, United States of America

Integrated Silicon Solution Incorporated

Forward Citations = 1,047

80 inventors:

Paul Cheng (10 out of 12 patents)

Nelson L Chow (9 out of 9 patents)

Paul Jei-Zen Song (9 out of 13 patents)

4. Yong H Jiang (8 out of 9 patents)

5. Seong Jun Jang (7 out of 8 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Integrated Silicon Solution Incorporated. Retrieved from https://idiyas.com/company/integrated-silicon-solution

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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