The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2025
Filed:
Nov. 23, 2022
Integrated Silicon Solution Inc., Milpitas, CA (US);
Youngjin Yoon, Milpitas, CA (US);
Kwang Kyung Lee, Milpitas, CA (US);
Seung Cheol Bae, Milpitas, CA (US);
Kangmin Lee, Milpitas, CA (US);
Sangmin Jun, Milpitas, CA (US);
Sun Byeong Yoon, Milpitas, CA (US);
INTEGRATED SILICON SOLUTION INC., Milpitas, CA (US);
Abstract
Provided is a memory device, including a plurality of memory banks. Each of the memory banks includes a memory array and a driver circuit. The driver circuit is coupled to the memory array, arranged to operably write data to the memory array according to write signals. The driver circuit includes a plurality of row driver circuits each coupled to a row of the memory cells. A global driver power circuit coupled to the row driver circuits in the plurality of memory banks to provide a global driver power. Each of the memory banks further includes a local driver power circuit coupled to respective row driver circuits in each of the memory banks to provide a local driver power. The local driver power circuit includes a first P-type MTCMOS coupled to a supply voltage and a control signal, controlled by the control signal to provide a local multi-threshold power signal to the respective row driver circuits.