The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2024
Filed:
Jan. 06, 2023
Integrated Silicon Solution Inc., Milpitas, CA (US);
Sang Min Jun, Milpitas, CA (US);
Kwang Kyung Lee, Milpitas, CA (US);
Seung Cheol Bae, Milpitas, CA (US);
Kang Min Lee, Milpitas, CA (US);
Young Jin Yoon, Milpitas, CA (US);
Sun Byeong Yoon, Milpitas, CA (US);
Integrated Silicon Solution Inc., Milpitas, CA (US);
Abstract
The present invention relates to a signal synchronization adjustment method and a signal synchronization adjustment circuit, for applying to data reading according to a reference clock signal between a memory controller and a dynamic random access memory in an electronic device. First, the memory controller triggers a command signal to the dynamic random access memory; then, the dynamic random access memory delays for a column selection signal latency time according to a first rising edge of the reference clock signal, and then triggers a column selection signal; after that, the dynamic random access memory delays for an internal data strobe signal latency time, and then triggers an internal data strobe signal; finally, the dynamic random access memory delays for an external data strobe signal latency time, and then triggers an external data strobe signal. The signal synchronization adjustment circuit is applied to the signal synchronization adjustment method.