For the Inventor, By the Inventor

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Fremont, CA, United States of America

Chippac, Inc.

USPTO Granted Patents = 75

EPO Patents = 1

Trademarks = 1

Forward Citations = 2,060

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45 inventors (with patents filed for the assignee):

Marcos Karnezos (43 out of 59 patents)

Rajendra D Pendse (17 out of 144 patents)

Flynn P Carson (11 out of 45 patents)

4. Seung Wook Park (5 out of 349 patents)

5. Hun-Teak Lee (5 out of 5 patents)

6. Ki-Youn Jang (5 out of 5 patents)

7. Nazir Ahmad (4 out of 11 patents)

8. Hyeog Chan Kwon (4 out of 20 patents)

9. Jong-Kook Kim (4 out of 4 patents)

10. Chul-Sik Kim (4 out of 4 patents)

11. Taekeun Lee (4 out of 4 patents)

12. Kyung-Moon Kim (4 out of 7 patents)

13. Young-Do Kweon (3 out of 5 patents)

14. Jong Wook Ju (3 out of 18 patents)

15. Sang Ho Lee (3 out of 3 patents)

Core Competencies:

Multiple Chip Package

Wire Bond Interconnection

Flip Chip Interconnect

Semiconductor Packaging

Ball Grid Array

Chip Scale Package

Die Attach Methods

Spacer Die Structure

Leadframe Package

Heatsink Integration

Multichip Module

Bumping Techniques

75 patents: Sort by Forward Citations

1. 8970049 - Multiple chip package module having inverted package stacked over die (2015-03-03),

2. 8623704 - Adhesive/spacer island structure for multiple die package (2014-01-07),

3. 8552551 - Adhesive/spacer island structure for stacking over wire bonded die (2013-10-08),

4. 8143100 - Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages (2012-03-27),

5. 8129263 - Wire bond interconnection and method of manufacture thereof (2012-03-06),

6. 8030756 - Plastic ball grid array package with integral heatsink (2011-10-04),

7. 8030134 - Stacked semiconductor package having adhesive/spacer structure and insulation (2011-10-04),

8. 7986047 - Wire bond interconnection (2011-07-26),

9. 7935572 - Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages (2011-05-03),

10. 7880313 - Semiconductor flip chip package having substantially non-collapsible spacer (2011-02-01),

11. 7829382 - Method for making semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package (2010-11-09),

12. 7749807 - Method of fabricating a semiconductor multipackage module including a processor and memory package assemblies (2010-07-06),

13. 7745322 - Wire bond interconnection (2010-06-29),

14. 7732254 - Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages (2010-06-08),

15. 7692279 - Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package (2010-04-06),

ChipPAC, Inc. is a leading provider of semiconductor packaging and test services. With over 50 years of industry experience, the company offers innovative packaging solutions to enable advanced semiconductor technologies. ChipPAC's expertise includes flip chip, wafer-level packaging, advanced packaging, and system-in-package solutions. The company serves a diverse range of industries including automotive, consumer electronics, telecommunications, and more.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 30 2025

75 Patents

#31 in Fremont, CA

#1,129 in California

#4,709 in US

#9,625 in the World

Fremont, CA, United States of America

Chippac, Inc.

Forward Citations = 2,060

45 inventors:

Marcos Karnezos (43 out of 59 patents)

Rajendra D Pendse (17 out of 144 patents)

Flynn P Carson (11 out of 45 patents)

4. Seung Wook Park (5 out of 349 patents)

5. Hun-Teak Lee (5 out of 5 patents)

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