Suwon, South Korea

Jong-Kook Kim

This inventor holds 4 USPTO granted patents. Top assignee: Chippac, Inc.. Active years: 2008-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jong-Kook Kim. Retrieved from https://idiyas.com/inventor/jong-kook-kim-qcd77fn1

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 2

Forward Citations = 13(Granted Patents)


Location History:

  • Jungja-dong, KR (2008)
  • Suwon, KR (2010 - 2012)

Company Filing History:


Years Active: 2008-2012

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4 patents (USPTO):Explore Patents

Title: Innovations of Jong-Kook Kim

Introduction

Jong-Kook Kim is a notable inventor based in Suwon, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. His work focuses on improving the efficiency and reliability of semiconductor packages.

Latest Patents

Among his latest patents is a method of manufacturing a semiconductor package. This method includes providing a substrate, mounting a semiconductor die on the substrate, and attaching a wire interconnection between the die pad and a support pedestal. Another significant patent is for a wire bond interconnection that enhances the connection between a die pad and a bond finger. This innovation includes a support pedestal at the bond site, ensuring a robust electrical connection.

Career Highlights

Jong-Kook Kim is currently employed at Chippac, Inc., where he continues to develop cutting-edge technologies in semiconductor packaging. His expertise has led to advancements that are crucial for the electronics industry.

Collaborations

He has collaborated with notable colleagues such as Hun-Teak Lee and Chul-Sik Kim, contributing to various projects that enhance semiconductor technology.

Conclusion

Jong-Kook Kim's innovative work in semiconductor technology has made a lasting impact on the industry. His patents reflect a commitment to advancing the field and improving the performance of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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