Enter assignee name

% Expired Patents = 16.1

Forward Citations = 14

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6 inventors (with patents filed for the assignee):

Paul A Clifton (25 out of 58 patents)

Andreas Goebel (20 out of 40 patents)

R Stockton Gaines (13 out of 36 patents)

4. Walter A Harrison (10 out of 14 patents)

5. Daniel E Grupp (6 out of 44 patents)

6. Daniel J Connelly (6 out of 53 patents)

31 patents: Sort by Forward Citations

1. 12557347 - Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer (2026-02-17),

2. 12477776 - Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height (2025-11-18),

3. 12402365 - SOI wafers and devices with buried stressors (2025-08-26),

4. 12336263 - Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers (2025-06-17),

5. 12034078 - Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height (2024-07-09),

6. 11978800 - Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer (2024-05-07),

7. 11843040 - MIS contact structure with metal oxide conductor (2023-12-12),

8. 11804533 - Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers (2023-10-31),

9. 11791411 - Relating to SOI wafers and devices with buried stressors (2023-10-17),

10. 11728624 - Tensile strained semiconductor photon emission and detection devices and integrated photonics system (2023-08-15),

11. 11610974 - Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers (2023-03-21),

12. 11476364 - Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer (2022-10-18),

13. 11462643 - Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height (2022-10-04),

14. 11355613 - Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions (2022-06-07),

15. 11322615 - SOI wafers and devices with buried stressor (2022-05-03),

Acorn Semi, LLC is a semiconductor manufacturing company specializing in the production of advanced microchips. We offer a wide range of integrated circuits (ICs) that power various electronic devices, from smartphones and tablets to automotive systems and industrial equipment. With a focus on innovation and quality, our team of experts delivers cutting-edge solutions that meet the demanding requirements of the modern tech industry. Visit our website to learn more about Acorn Semi and explore our product portfolio.

Profile summary based on public USPTO records.

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USPTO Data Jan 1 1976 - Sep 29 2026

31 Patents

#62 in Palo Alto, CA

#2,609 in California

#10,912 in US

#21,217 in the World

Palo Alto, CA, United States of America

Acorn Semi, LLC