Tokyo, Japan

Yoshihiro Takaishi

This inventor holds 50 USPTO granted patents and 9 published patent applications, primarily in Semiconductor Devices (CPC class H01L). Top assignees: Elpida Memory, Inc., Nec Corporation, Ps4 Luxco S.a.r.l.. Active years: 1997-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yoshihiro Takaishi. Retrieved from https://idiyas.com/inventor/yoshihiro-takaishi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 50 

% Patents Active = 68.0

Average Co-Inventor Count = 1.2

ph-index = 10

Forward Citations = 607(Granted Patents)

Forward Citations (Not Self Cited) = 598(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Chuo-ku, JP (2012)
  • Tokyo, JP (1997 - 2017)

Company Filing History:


Years Active: 1997-2017

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Areas of Expertise:
Semiconductor Device
Vertical Transistor
Memory Cell
Data Processing System
High Voltage Transistor
Cylindrical Capacitor
Polymetal Gate Electrode
Dynamic Random Access Memory
Isolation Characteristics
Impurity Implantation
Trench Gate
Fin-Structured Storage Electrode
50 patents (USPTO):Explore Patents

Title: **Yoshihiro Takaishi: A Pioneer in Semiconductor Innovations**

Introduction

Yoshihiro Takaishi is a notable inventor based in Tokyo, Japan, with an impressive portfolio of 50 patents. His work primarily focuses on advancements in semiconductor devices, demonstrating a significant contribution to the field of technology and innovation.

Latest Patents

One of Takaishi's latest patents describes a "Semiconductor device and production method therefor." This innovative device comprises first to third gate electrodes arranged within a first active region and embedded in corresponding trenches. It features two semiconductor pillars and two vertical transistors, both of which utilize shared gate electrodes, redefining operational efficiencies in semiconductor technology.

Another important patent introduced by Takaishi is centered around a "Semiconductor device" that integrates parallel transistors. This design includes semiconductor pillars arranged perpendicularly to the semiconductor substrate, enhancing connectivity among multiple vertical transistors within the active region. The patent also outlines unique configurations of lower and upper diffusion layers, along with comprehensive gate electrode placements, which optimize semiconductor performance.

Career Highlights

Throughout his career, Yoshihiro Takaishi has made a notable impact while working with prominent companies such as NEC Corporation and Elpida Memory, Inc. His roles in these organizations have allowed him to develop groundbreaking semiconductor technologies and innovations that continue to influence the industry today.

Collaborations

Takaishi's professional journey has been marked by collaborations with other talented individuals, including his coworkers Masato Sakao and Kazuo Ogawa. Together, they have driven advancements in semiconductor technologies, contributing to multiple successful patent applications and broadening the horizons of electronic device capabilities.

Conclusion

Yoshihiro Takaishi's contributions to the semiconductor industry through his numerous patents and collaborations underscore his role as an influential inventor. His innovations not only push the boundaries of technology but also pave the way for future developments in the field, solidifying his legacy as a pioneer in semiconductor inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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