The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

Aug. 25, 2014
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Yoshihiro Takaishi, Tokyo, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/823487 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01); H01L 29/0653 (2013.01);
Abstract

A semiconductor device has an active region defined by a device isolation region arranged on a surface of a semiconductor substrate, a plurality of transistor pillars arranged along a first direction within the active region, and a first dummy pillar disposed in the device isolation region. The first dummy pillar is arranged on a line extending along the first direction from the transistor pillars. The semiconductor device also has a second dummy pillar disposed between the transistor pillars and the first dummy pillar, a gate electrode continuously extending so as to surround each of side surfaces of the transistor pillars, a first power supply gate electrode surrounding a side surface of the first dummy pillar, and a second power supply gate electrode surrounding a side surface of the second dummy pillar. The second power supply gate electrode is connected to the gate electrode and the first power supply gate electrode.


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