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For the Inventor, By the Inventor

Hsinchu, Taiwan

Yi-Min Chen

This inventor holds 30 USPTO granted patents and 1 published patent application, primarily in High Voltage Semiconductor. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2017-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Min Chen. Retrieved from https://idiyas.com/inventor/yi-min-chen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30 

% Patents Active = 96.7

Average Co-Inventor Count = 5.5

ph-index = 3

Forward Citations = 29(Granted Patents)


Company Filing History:

goldMedal30 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2017-2026

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Areas of Expertise:
High Voltage
Semiconductor Device
LDMOS Transistor
Capacitor Structure
Shielding Structure
Interconnect Structure
Metal-Oxide-Semiconductor
Junction Termination
Series Resistor
Cycle Time Reduction
Thermal Management
Conductive Structure
30 patents (USPTO):Explore Patents
1. 12525484 - Interconnect structure for multi-thickness semiconductor device (2026-01-13),
2. 12456677 - Via landing on first and second barrier layers to reduce cleaning time of conductive structure (2025-10-28),
3. 12062687 - Semiconductor device including a capacitor (2024-08-13),
4. 11942543 - Semiconductor device structure with high voltage device (2024-03-26),
5. 11923425 - Shielding structure for ultra-high voltage semiconductor devices (2024-03-05),
6. 11862675 - High voltage metal-oxide-semiconductor (HVMOS) device integrated with a high voltage junction termination (HVJT) device (2024-01-02),
7. 11776901 - Via landing on first and second barrier layers to reduce cleaning time of conductive structure (2023-10-03),
8. 11728374 - Semiconductor device including a capacitor (2023-08-15),
9. 11588028 - Shielding structure for ultra-high voltage semiconductor devices (2023-02-21),
10. 11424359 - Semiconductor device structure with high voltage device (2022-08-23),
11. 11410991 - Series resistor over drain region in high voltage device (2022-08-09),
12. 11145713 - High voltage metal-oxide-semiconductor (HVMOS) device integrated with a high voltage junction termination (HVJT) device (2021-10-12),
13. 11145709 - Semiconductor device including a capacitor (2021-10-12),
14. 11081352 - Method (and related apparatus) that reduces cycle time for forming large field integrated circuits (2021-08-03),
15. 10985020 - Method (and related apparatus) that reduces cycle time for forming large field integrated circuits (2021-04-20),

Title: Yi-Min Chen: Innovator from Hsinchu

Introduction: Yi-Min Chen is a renowned inventor hailing from Hsinchu, Taiwan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Yi-Min Chen holds several patents in the areas of semiconductor technology, artificial intelligence, and renewable energy solutions, showcasing his diverse range of expertise and innovative thinking.

Career Highlights: With a career spanning over two decades, Yi-Min Chen has worked with leading tech companies and research institutions, spearheading projects that have revolutionized the industry. His commitment to pushing the boundaries of technology has earned him recognition as a visionary in his field.

Collaborations: Throughout his career, Yi-Min Chen has collaborated with top researchers, engineers, and scientists from around the world, fostering a culture of innovation and knowledge-sharing. His collaborative efforts have led to the development of cutting-edge technologies that have had a lasting impact on society.

Conclusion: Yi-Min Chen's passion for innovation, coupled with his technical expertise, has solidified his position as a trailblazer in the world of technology. His relentless pursuit of excellence continues to inspire the next generation of inventors and innovators worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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