Santa Clara, CA, United States of America

Yervant Zorian

USPTO Granted Patents = 48 (Patent Applications = 1)

Average Co-Inventor Count = 2.7

ph-index = 15

Forward Citations = 539(Granted Patents)

Location History:

Princeton, NJ (US) (1992 - 2001)
Santa Clara County, CA (US) (1999 - 2001)
Somerset, NJ (US) (2001)
Mountain View, CA (US) (2018 - 2022)
Santa Clara, CA (US) (1999 - 2024)

Company Filing History:

Virage Logic Corporation

patents

5 out of 9,364

Lucent Technologies Inc.

patents

4. 3 out of 598

Agere Systems Guardian Corp.

patents

5. 2 out of 3,345

At&t Bell Laboratories

7. 1 out of 832,680

Other

patents

Years Active: 1992-2025

Loading Chart...

48 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12469527 - In situ delay measurements on integrated circuits using live data and pulse width modulation (2025-11-11),

2. 12266413 - Built-in self-test circuit for row hammering in memory (2025-04-01),

3. 12094548 - Diagnosing faults in memory periphery circuitry (2024-09-17),

4. 12002530 - Embedded memory transparent in-system built-in self-test (2024-06-04),

5. 11527298 - On-chip memory diagnostics (2022-12-13),

6. 11023310 - Detection of address errors in memory devices using multi-segment error detection codes (2021-06-01),

7. 10789398 - Method and apparatus for SOC with optimal RSMA (2020-09-29),

8. 10192635 - FinFET-based memory testing using multiple read operations (2019-01-29),

9. 10115477 - FinFET-based memory testing using multiple read operations (2018-10-30),

10. 9831000 - Testing electronic memories based on fault and test algorithm periodicity (2017-11-28),

11. 9541591 - Periodic signal measurement using statistical sampling (2017-01-10),

12. 9514258 - Generation of memory structural model based on memory layout (2016-12-06),

13. 9336342 - Memory hard macro partition optimization for testing embedded memories (2016-05-10),

14. 9053050 - Determining a desirable number of segments for a multi-segment single error correcting coding scheme (2015-06-09),

15. 8850277 - Detecting random telegraph noise induced failures in an electronic memory (2014-09-30),

Title: The Innovative Journey of Yervant Zorian

Introduction: Yervant Zorian, a distinguished inventor based in Santa Clara, CA, has made significant contributions to the field of technology through his groundbreaking innovations and patents.

Latest Patents: Yervant Zorian holds several recent patents in the areas of semiconductor testing and design for testability, showcasing his ongoing commitment to advancing technological solutions.

Career Highlights: With a career spanning over two decades, Yervant Zorian has held key roles in leading tech companies, driving forward the development of cutting-edge technologies and pioneering new approaches to semiconductor testing.

Collaborations: Throughout his career, Yervant Zorian has collaborated with top research institutions and universities, fostering a culture of innovation and knowledge-sharing within the tech community.

Conclusion: Yervant Zorian's dedication to innovation and his remarkable contributions to the field of technology continue to inspire future generations of inventors and engineers worldwide.

This text is generated by artificial intelligence and may not be accurate.

Please report any incorrect information to support@idiyas.com

1 patent pending:

Please report any incorrect information to support@idiyas.com

Inventor’s Patent Attorneys refers to legal professionals with specialized expertise in representing inventors throughout the patent process. These attorneys assist inventors in navigating the complexities of patent law, including filing patent applications, conducting patent searches, and protecting intellectual property rights. They play a crucial role in helping inventors secure patents for their innovative creations.