The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Sep. 12, 2014
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Aram Hakhumyan, Yerevan, AM;

Gurgen Harutyunyan, Abovyan, AM;

Samvel Shoukourian, Yerevan, AM;

Valery Vardanian, Yerevan, AM;

Yervant Zorian, Santa Clara, CA (US);

Assignee:

SYNOPSYS, INC., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/27 (2006.01); G11C 29/18 (2006.01); G11C 29/10 (2006.01); G11C 29/16 (2006.01); G11C 29/36 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G11C 29/18 (2013.01); G06F 11/27 (2013.01); G11C 29/10 (2013.01); G11C 29/16 (2013.01); G11C 29/36 (2013.01); G11C 2029/0405 (2013.01);
Abstract

An integrated circuit includes a memory and a memory test circuit, which when invoked to test the memory, is configured to generate one or more March tests applied to the memory. The memory test circuit is further configured to construct a table including a first index, a second index, and a first March test of the one or more March tests. The first index is associated with one or more families each characterized by a different length of the one or more March tests. The second index is associated with one or more mechanisms each characterized by a different property of the one or more March tests. The memory test circuit is further configured to generate a second March test from the first March test.


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