The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2025

Filed:

Sep. 16, 2022
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Grigor Tshagharyan, Yerevan, AM;

Gurgen Harutyunyan, Yerevan, AM;

Arun Kumar, Santa Clara, CA (US);

Yervant Zorian, Santa Clara, CA (US);

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/46 (2006.01); G11C 29/12 (2006.01); G11C 29/18 (2006.01);
U.S. Cl.
CPC ...
G11C 29/46 (2013.01); G11C 29/1201 (2013.01); G11C 29/18 (2013.01);
Abstract

A method for testing a chip includes writing, by a built-in self-test (BIST) circuit of the chip, a first row of a memory of the chip with a first set of values and reading, by the BIST circuit, a second row of the memory a first plurality of times. The second row is adjacent to the first row. The method also includes reading, by the BIST circuit, the first row to extract a second set of values from the first row and based on determining that at least one of the second set of values differs from a corresponding one of the first set of values, designating the first row as a vulnerable row.


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