The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Jun. 22, 2012
Karen Amirkhanyan, Yerevan, AM;
Karen Darbinyan, Pleasanton, CA (US);
Arman Davtyan, Yerevan, AM;
Gurgen Harutyunyan, Abovyan, AM;
Samvel Shoukourian, Yerevan, AM;
Valery Vardanian, Yerevan, AM;
Yervant Zorian, Santa Clara, CA (US);
Karen Amirkhanyan, Yerevan, AM;
Karen Darbinyan, Pleasanton, CA (US);
Arman Davtyan, Yerevan, AM;
Gurgen Harutyunyan, Abovyan, AM;
Samvel Shoukourian, Yerevan, AM;
Valery Vardanian, Yerevan, AM;
Yervant Zorian, Santa Clara, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A memory structural model is generated directly from memory configuration information and memory layout information in an efficient manner. Information on strap distribution is generated by analyzing configuration information of the memory and the corresponding memory layout. Information on scrambling of addresses in the memory layout is generated by programming the memory layout with physical bit patterns, extracting corresponding logical bit patterns and then analyzing the discrepancy between the physical bit patterns and the logical bit patterns. The strap distribution information and the address scrambling information are combined into the memory structural model used for designing an efficient test and repair engine.