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For the Inventor, By the Inventor

San Diego, CA, United States of America

Yangyang Sun

This inventor holds 22 USPTO granted patents and 42 published patent applications and 2 EPO patents, primarily in 3D Integrated Circuits. Top assignees: Qualcomm Incorporated, Micron Technology Incorporated. Active years: 2013-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yangyang Sun. Retrieved from https://idiyas.com/inventor/yangyang-sun

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 22 

% Patents Active = 77.3

 

Average Co-Inventor Count = 3.4

ph-index = 2

Forward Citations = 14(Granted Patents)


Location History:

  • Boise, ID (US) (2013 - 2015)
  • San Diego, CA (US) (2014 - 2024)

Company Filing History:

goldMedal18 out of 45,060 
 
Qualcomm Incorporated
 patents
silverMedal4 out of 39,294 
 
Micron Technology Incorporated
 patents

Years Active: 2013-2026

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Areas of Expertise:
Integrated Circuit
3DIC Package
High-Density Interconnection
Thermal Management
Pillar Interconnects
Wire Bonds
Dielectric Layer
Substrate Structure
Flip-Chip Bumping
Electrostatic Discharge
Vertical Capacitors
Photoimageable Adhesive
22 patents (USPTO):Explore Patents
1. 12740467 - Stress mitigating pillar bumps (2026-09-15),
2. 12740457 - Substrate structure including stacked substrates disposed in a shell (2026-09-15),
3. 12740390 - Stacked integrated circuit devices with face-to-face connections between logic and memory dies (2026-09-15),
4. 12666991 - Integrated device comprising pillar interconnects with variable widths (2026-06-23),
5. 12660649 - Package comprising a substrate and an interconnection die configured for high density interconnection (2026-06-16),
6. 12525574 - Three-dimensional (3D) integrated circuit (IC) (3DIC) package with a bottom die layer employing an extended interposer substrate, and related fabrication methods (2026-01-13),
7. 12500188 - Flip-chip bumping metal layer and bump structure (2025-12-16),
8. 12500187 - Package comprising an interconnection die located between substrates (2025-12-16),
9. 12469811 - Package comprising wire bonds coupled to integrated devices (2025-11-11),
10. 12463127 - Integrated circuit (IC) package employing a re-distribution layer (RDL) substrate(s) with photosensitive dielectric layer(s) for increased package rigidity, and related fabrication methods (2025-11-04),
11. 12355000 - Package comprising a substrate and a high-density interconnect integrated device (2025-07-08),
12. 12113038 - Thermal compression flip chip bump for high performance and fine pitch (2024-10-08),
13. 11948909 - Package comprising spacers between integrated devices (2024-04-02),
14. 11676922 - Integrated device comprising interconnect structures having an inner interconnect, a dielectric layer and a conductive layer (2023-06-13),
15. 11557557 - Flip-chip flexible under bump metallization size (2023-01-17),

Title: Yangyang Sun: Pioneering Inventor from San Diego

Introduction: Yangyang Sun is a distinguished inventor based in San Diego, CA, known for his groundbreaking contributions to various technological fields.

Latest Patents: Yangyang Sun holds several patents in the areas of renewable energy, artificial intelligence, and biotechnology, showcasing his versatility and innovative spirit.

Career Highlights: With a career spanning over two decades, Yangyang Sun has worked with leading tech companies, research institutions, and universities, consistently pushing the boundaries of innovation.

Collaborations: Throughout his career, Yangyang Sun has collaborated with top scientists, engineers, and researchers globally, fostering a culture of creativity and excellence in his projects.

Conclusion: Yangyang Sun's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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