The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Aug. 18, 2023
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Yue Li, San Diego, CA (US);

Ryan Lane, San Diego, CA (US);

Yangyang Sun, San Diego, CA (US);

Charles David Paynter, Encinitas, CA (US);

Durodami Lisk, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 42/00 (2026.01); H10W 70/09 (2026.01); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 72/00 (2026.01); H10W 72/20 (2026.01); H10W 72/90 (2026.01); H10W 90/20 (2026.01); H10W 90/22 (2026.01); H10W 90/24 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 70/611 (2026.01); H10W 70/65 (2026.01); H10W 90/701 (2026.01); H10W 90/24 (2026.01); H10W 90/726 (2026.01); H10W 90/792 (2026.01);
Abstract

A stacked integrated circuit (IC) device includes a first die having a first face, a first active region adjacent to the first face, and first die-interconnect contacts disposed on the first face and connected to first circuitry. The stacked IC device includes a second die having a second face, a second active region adjacent to the second face, and second die-interconnect contacts disposed on the second face and connected to second circuitry. The first face is oriented toward the second face, and the first die-interconnect contacts are connected to the second die-interconnect contacts. The stacked IC device includes a set of redistribution layers electrically connected to redistribution contacts on the first face, the second face, or both. The stacked IC device also includes interconnect conductors connected to the redistribution layers to provide signal paths from the first die, the second die, or both, to a set of external contacts.


Find Patent Forward Citations

Quick Actions:

Li, Yue. (2026). Stacked integrated circuit devices (U.S. Patent No. 12787878). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787878

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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