The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Nov. 10, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Yangyang Sun, San Diego, CA (US);

Li-Sheng Weng, San Diego, CA (US);

Zhimin Song, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 25/0655 (2013.01); H01L 21/56 (2013.01); H01L 23/31 (2013.01); H01L 23/5381 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 24/14 (2013.01);
Abstract

A package comprising a substrate, a first integrated device coupled to the substrate, a second integrated device coupled to the substrate, an interconnect integrated device coupled to the first integrated device and the second integrated device, and an underfill. The substrate includes a cavity. The interconnect integrated device is located over the cavity of the substrate. The underfill is located (i) between the first integrated device and the substrate, (ii) between the second integrated device and the substrate, (iii) between the interconnect integrated device and the first integrated device, and (iv) between the interconnect integrated device and the second integrated device.


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