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Zhudong, Taiwan

Tung-Heng Hsieh

This inventor holds 113 USPTO granted patents and 26 published patent applications, primarily in Semiconductor Devices (CPC class H01L27-0207). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2008-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tung-Heng Hsieh. Retrieved from https://idiyas.com/inventor/tung-heng-hsieh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 113 

% Patents Active = 94.7

Average Co-Inventor Count = 4.2

ph-index = 8

Forward Citations = 200(Granted Patents)

Forward Citations (Not Self Cited) = 166(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Zhoudong Town, TW (2017)
  • Hsinchu, TW (2008 - 2023)
  • Hsinchu County, TW (2011 - 2024)
  • Zhudong Town, TW (2014 - 2024)
  • Zhudong Township, TW (2020 - 2024)

Company Filing History:

goldMedal113 out of 42,926 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2008-2026

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Areas of Expertise:
Integrated Circuit
Semiconductor Structure
Gate Isolation
Dummy Padding
Epitaxial Features
Chip Integration
Standard Cell Design
Leakage Reduction
Conductive Features
Mask Formation
Fuse Structure
Isolation Regions
113 patents (USPTO):Explore Patents
1. 12622064 - Integrated standard cell structure (2026-05-05),
2. 12520597 - Integrated circuit structure having tap cell (2026-01-06),
3. 12501713 - Revising IC layout design to eliminate gaps between isolation structures (2025-12-16),
4. 12484299 - Integrated circuit structure with gate structures on grids and method for forming the same (2025-11-25),
5. 12471343 - Gate isolation features in semiconductor devices and methods of fabricating the same (2025-11-11),
6. 12426380 - Integrated circuit having angled conductive feature (2025-09-23),
7. 12423496 - Methods for forming pattern layout, mask, and semiconductor structure (2025-09-23),
8. 12419102 - Semiconductor devices (2025-09-16),
9. 12402384 - Standard cell design with dummy padding (2025-08-26),
10. 12376338 - Semiconductor device structure with dielectric dummy gate and method for forming the same (2025-07-29),
11. 12375080 - Fuse structure (2025-07-29),
12. 12353815 - Method for chip integration (2025-07-08),
13. 12349446 - Structure and formation method of semiconductor device with epitaxial structures (2025-07-01),
14. 12336250 - Semiconductor device structure and method for forming the semiconductor device structure (2025-06-17),
15. 12300696 - Semiconductor devices having fins and multiple isolation regions (2025-05-13),

Title: The Innovative Journey of Tung-Heng Hsieh

Introduction:

Tung-Heng Hsieh, a talented inventor hailing from Zhudong Town, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

Tung-Heng Hsieh's latest patents focus on advancements in renewable energy technologies, particularly in the development of solar power systems that are more efficient and cost-effective.

Career Highlights:

Throughout his illustrious career, Tung-Heng Hsieh has been recognized for his pioneering work in the renewable energy sector. His inventions have not only revolutionized the industry but have also had a positive impact on the environment.

Collaborations:

Tung-Heng Hsieh has collaborated with leading research institutions and universities to further his research and bring his innovative ideas to life. His partnerships have been instrumental in pushing the boundaries of technological innovation.

Conclusion:

In conclusion, Tung-Heng Hsieh's passion for innovation and dedication to creating a sustainable future have solidified his position as a prominent figure in the world of inventors. His work continues to inspire and pave the way for a brighter tomorrow.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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