The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

May. 17, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shao-Jyun Wu, Hsinchu, TW;

Yung Feng Chang, Hsinchu, TW;

Tung-Heng Hsieh, Hsinchu, TW;

Bao-Ru Young, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/02 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H10D 64/017 (2025.01); H01L 21/0259 (2013.01); H10D 30/031 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01);
Abstract

A method for forming a semiconductor device structure includes forming a fin structure with alternating stacked first semiconductor layers and second semiconductor layers over a substrate. The method also includes forming a cladding layer over the fin structure. The method also includes forming a fin isolation structure beside the cladding layer. The method also includes forming a capping layer over the fin isolation structure. The method also includes forming a dummy gate structure across the capping layer. The method also includes patterning the dummy gate structure. The method also includes patterning the capping layer by using the dummy gate structure as a mask layer. The method also includes removing the dummy gate structure.


Find Patent Forward Citations

Loading…